Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Patent
1996-03-14
1998-09-01
Picardat, Kevin
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
438106, H01L 2144
Patent
active
058010726
ABSTRACT:
A method of assembling flip chips in a package. Solder bumps are attached to a first flip chip and to a second flip chip. A package substrate having first and second opposing sides is provided, and the first flip chip is electrically connected to the first side of the package substrate using the solder bumps attached to the first flip chip. The second flip chip is also electrically connected to the second side of the package substrate using the solder bumps attached to the second flip chip. The position of the second flip chip is substantially opposed to and aligned with the position of the first flip chip. The first and second flip chips are under filled with a heat conductive epoxy. The first flip chip is encapsulated against the first side of the package substrate, and the second flip chip is encapsulated against the second side of the package substrate. Solder balls are attached to the first side of the package insert. By attaching the flip chips to opposite sides of the package substrate, balancing the structure of the overall package, bending stress is reduced due to the flip chips having similar thermal coefficients of expansion. Additional benefits include improved electrical performance, reduced weight, and reduced size of the packaged circuit.
REFERENCES:
patent: 5071787 (1991-12-01), Mori et al.
patent: 5147815 (1992-09-01), Casto
patent: 5227338 (1993-07-01), Kryzaniwsky
patent: 5340771 (1994-08-01), Rostoker
patent: 5366933 (1994-11-01), Golwalkar et.al
patent: 5468681 (1995-11-01), Pasch
patent: 5504035 (1996-04-01), Rostoker et al.
patent: 5527740 (1996-06-01), Golwalkar et al.
LSI Logic Corporation
Picardat Kevin
LandOfFree
Method of packaging integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of packaging integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of packaging integrated circuits will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-269753