Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-05-02
2003-03-11
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S767000, C438S125000, C257S009000, C257S015000
Reexamination Certificate
active
06531414
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to semiconductor device manufacturing process and, in particular, to oxidation.
BACKGROUND OF THE INVENTION
In an article entitled “III-V Compound Semiconductor Native Oxides—The Newest of the Semiconductor Device Materials,” published in
Compound Semiconductor
, January 1997, Russell D. DuPuis chronicled the development of the semiconductor oxide. Mr. DuPuis points out that Carl Frosch, of Bell Telephone Laboratories, disclosed in 1955 that a silicon wafer could be oxidized by exposing it to high temperature (e.g., 1050 degrees Celsius) and water vapor (i.e., steam) in either oxygen or nitrogen to form a layer of silicon dioxide thereon. The oxide, or native oxide, exhibited sufficiently high insulating properties to be used as an insulator in electronic devices manufacture in silicon.
It was widely thought that an insulating oxide could not be grown on Group III-V semiconductor materials with insulating properties as good as silicon dioxide. In 1990, Nick Holonyak, Jr. et al. discovered that such an oxide could be made. The discovery was described in U.S. Pat. Nos. 5,262,360, entitled “AlGaAs NATIVE OXIDE”; 5,373,522, entitled “SEMICONDUCTOR DEVICES WITH NATIVE ALUMINUM OXIDE REGIONS”; 5,696,023, entitled “METHOD OF MAKING ALUMINUM GALLIUM ARSENIDE SEMICONDUCTOR DEVICE WITH NATIVE OXIDE LAYER”; and 5,567,980, entitled “NATIVE OXIDE OF AN ALUMINUM-BEARING GROUP III-V SEMICONDUCTOR.” U.S. Pat. Nos. 5,262,360; 5,373,522; 5,696,023; and 5,567,980 are hereby incorporated by reference into the specification of the present invention. The discovery was also described in an article entitled “Hydrolyzation oxidation of Al
x
Ga
1−x
As—AlAs—GaAs quantum well heterostructures and superlattices,” by J. M. Dallesasse, N. Holonyak, Jr., A. R. Sugg, T. A. Richard, and N. El-Zein, published by the American Institute of Physics in
Appl. Phys. Lett
., 57, Dec. 24, 1990, pp. 2844-2846. The discovery is, essentially, exposing an aluminum-bearing Group III-V semiconductor material to high temperature (e.g., 375 degrees Celsius) and water vapor in nitrogen until a user-definable portion of the aluminum-bearing Group III-V semiconductor material is oxidized. Partial oxidation is useful in an electronic device for confining current flow along a user-definable path. Complete oxidation is useful in an electronic device for forming an insulator or part of a mirror.
Other relevant prior art includes an article by H. Gebretsadik et al., entitled “Lateral oxidation of InAlAs in InP-based heterostructures for long wavelength vertical cavity surface emitting laser application,” published by the American Institute of Physics in
Appl. Phys. Lett
., Jan. 12, 1998, on pp. 135-137, and an article by P. Legay et al., entitled “Oxide confining layer on an InP substrate,” published by the American Institute of Physics in the
Journal of Applied Physics
, Vol. 85, No. 4, Feb. 15, 1999. Each article discloses a method of oxidizing a particular Group III-V semiconductor material on an InP substrate.
Most of the prior art methods of forming an oxide in a Group III-V semiconductor material involve the wet thermal oxidation of an Al
x
Ga
(1−x)
As layer because.such methods are repeatable and are very controllable. However, such oxidation methods are limited to high aluminum content Group III-V semiconductor materials such as Al
x
Ga
(1−x)
As lattice matched to GaAs. Lattices are matched to avoid introducing any strain in the resulting structure which might reduce the reliability of the structure. Devices based on such materials are too slow and operate at the wrong wavelength for use in a fiber optic communication system. However, devices based on Group III-V semiconductor materials lattice matched to Indium Phosphide (InP) are fast enough and operate at the correct wavelength (i.e., 1.2 um to 1.6 um) for use in a fiber optic communication system. Unfortunately, the only high aluminum containing Group III-V semiconductor materials that are lattice matched to InP are AlAs
x
Sb
(1−x)
materials with an x value near 0.5. During the oxidation process, the metallic elements (e.g., As and Sb) separate and forms.conductive interfacial layers which lead to increased strain in the oxidized structure. The strain may reduce the reliability of the structure.
There is no x value for which Al
x
Ga
(1−x)
As is lattice matched to InP. Al
y
In
(1−y)
As materials are more suitable but are only lattice matched to InP for y values near 0.48, which is a relatively low aluminum content for oxidation purposes. Therefore, present oxidation methods are not easily transferred to devices based on InP substrates. The maximum aluminum composition of an arsenide-based ternary material that is lattice matched to InP is Al
0.48
In
0.52
As. Because of the relatively small aluminum content, the oxidation rate in this material is very slow (~1 um/hour at 500 degrees Celsius).
SUMMARY OF THE INVENTION
It is an object of the present invention to form a native oxide on a Group III-V semiconductor without being required to match the lattice of a Group III-V semiconductor material.
It is another object of the present invention to form a native oxide on a Group III-V semiconductor in a timely manner that is compatible with device production methods so that the devices made therefrom are not degraded during the oxidation process of the present method.
The present invention is a method of forming a native oxide.
The first step of the method is forming at least one strain-compensated superlattice of Group III-V semiconductor material, where each at least one strain-compensated superlattice includes at least two monolayers of a Group III-V semiconductor material and at least two monolayers of an aluminum-bearing Group III-V semiconductor material. In the preferred embodiment, the at least one strain-compensated superlattice is InAs/AlAs, where each at least one strain-compensated superlattice includes at least two monolayers of InAs and at least two monolayers of AlAs.
The preferred structure on which the present method is performed includes an InP substrate, 3000 angstroms of an InP layer on the InP substrate, the at least one strain-compensated superlattice on the InP layer, and a 500 angstrom InP cap layer on the at least one superlattice.
The second step of the method is exposing each at least one strained-compensated superlattice to a water-containing environment and a temperature of at least about 425 degrees Celsius to convert at least a portion of said at least one strain-compensated superlattice to a native oxide. The at least one strain-compensated superlattice may be oxidized completely through or to a user-definable depth on either or both sides.
One oxidation method involves exposing each at least one strained compensated superlattice to nitrogen saturated with water vapor at a temperature of about 500 degrees Celsius, where the nitrogen flowing at a rate of 3.6 l/minute is bubbled through a water bubbler at a temperature of from 70 to 95 degrees Celsius. Another oxidation method involves exposing each at least one strained compensated superlattice to an electrolyte such as H
2
O
2
. Yet another oxidation method involves exposing each at least one strained compensated superlattice to oxygen plasma.
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patent:
Johnson Frederick G.
Koley Bikash
Wasiczko Linda M.
Chaudhuri Olik
Morelli Robert D.
The United States of America as represented by The National Secu
Toledo Fernando
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