Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
2011-08-02
2011-08-02
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S185240
Reexamination Certificate
active
07990779
ABSTRACT:
A method of operating a semiconductor device including a memory cell of a 1-T DRAM is provided in which a gate voltage level in a hold mode is adjusted to adjust a data sensing margin of the semiconductor device.
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Choi Sang-moo
Kim Won-joo
Lee Tae-Hee
Harness Dickey & Pierce PLC
Samsung Electronics Co,. Ltd.
Tran Michael T
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