Method of operating semiconductor devices

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

Reexamination Certificate

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C365S185240

Reexamination Certificate

active

07990779

ABSTRACT:
A method of operating a semiconductor device including a memory cell of a 1-T DRAM is provided in which a gate voltage level in a hold mode is adjusted to adjust a data sensing margin of the semiconductor device.

REFERENCES:
patent: 6787835 (2004-09-01), Atwood et al.
patent: 6949782 (2005-09-01), Atwood et al.
patent: 7139214 (2006-11-01), Atwood et al.
patent: 7212441 (2007-05-01), Yamazoe et al.
patent: 7499310 (2009-03-01), Park et al.
patent: 2005/0219934 (2005-10-01), Hanzawa et al.
patent: 2008/0080238 (2008-04-01), Yuda
patent: 2007-018588 (2007-01-01), None
patent: 2007-073680 (2007-03-01), None
patent: 2007-141890 (2007-06-01), None
patent: 2007-287975 (2007-11-01), None

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