Method of operating a SONOS memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C365S185030, C365S185270

Reexamination Certificate

active

07825459

ABSTRACT:
A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

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patent: 6208000 (2001-03-01), Tanamoto et al.
patent: 6288943 (2001-09-01), Chi
patent: 6444545 (2002-09-01), Sadd et al.
patent: 6670669 (2003-12-01), Kawamura
patent: 6690059 (2004-02-01), Lojek
patent: 7672159 (2010-03-01), Kuo et al.
patent: 2008/0290399 (2008-11-01), Levy et al.
patent: 0 843 361 (1998-05-01), None
patent: WO 02/03430 (2002-01-01), None

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