Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2008-06-27
2010-10-05
Dinh, Son (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189170, C365S203000
Reexamination Certificate
active
07808840
ABSTRACT:
In a method of operating a non-volatile memory device, a bit line is precharged to a positive voltage, which is input through a common source line of cell strings of memory cells, according to a degree in which a selected memory cell has been programmed. Data according to a voltage level of a sensing node, which is changed according to a level of the voltage of the bit line, is stored in a first latch of a page buffer. The data stored in the first latch is transferred to a second latch through the sensing node.
REFERENCES:
patent: 6996014 (2006-02-01), Lee et al.
patent: 7092293 (2006-08-01), Young et al.
patent: 1020070068002 (2007-06-01), None
Baek Kwang Ho
Cha Jae Won
Won Sam Kyu
Dinh Son
Hynix / Semiconductor Inc.
Nguyen Nam
Townsend and Townsend / and Crew LLP
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