Method of minimizing reactive ion etch damage of organic...

Details Method of minimizing reactive ion etch damage of organic... Method of minimizing reactive ion etch damage of organic...

1999-12-21

2001-07-24

Mills, Gregory (Department: 1763)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C134S001200, C134S001300, C216S067000, C438S706000, C438S715000, C438S734000

Reexamination Certificate

active

06265320

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to methods of semiconductor device fabrication and, in particular, to methods of minimizing reactive ion etch damage of organic insulating layers during semiconductor device fabrication.
BACKGROUND
As feature sizes in integrated circuits are decreased to 0.18 &mgr;m and below, issues of signal delay, power consumption, and crosstalk become increasingly significant. Miniaturization generally results in increased crosstalk or capacitive coupling between conductors which is associated with increased signal delay. One way to diminish capacitive coupling is to decrease the dielectric constant of the insulating material which separates conducting paths.
Silicon dioxide (SiO
2
) has long been used in integrated circuits as the primary insulating material. With a dielectric constant of approximately 4, SiO
2
has a relatively low dielectric constant for an inorganic material. One option for achieving a dielectric material with a lower dielectric constant is to use organic or polymeric materials. For example, a class of poly-p-xylylenes termed parylenes has been identified as candidate insulating materials. Parylene films derived from the parylene AF4 dimer, chemical name octafluoro-[2,2]paracyclophane, have dielectric constants down to 2.24 and other variants are being tested which may have even lower dielectric constants. Fluorinated poly(arylene ethers) have also been identified as low dielectric constant materials and polytetrafluoroethylene, known commercially as TEFLON®, or related fluoropolymers are known to have dielectric constants down to approximately 1.7.
Fabrication of integrated circuit devices typically requires numerous processing steps to deposit and pattern multiple layers of conducting and insulating materials. One of these processing steps is reactive ion etching (RIE), which uses chemically reactive radicals and ions to remove material from a surface of a semiconductor device to produce desired features. Reactive Ion Etching is described, for example, in Chapter 16 of Wolf and Tauber,
Silicon Processing for the VLSI Era Vol
1. [Lattice Press, 1986] which lists process gases conventionally used to etch different materials. For organic solids, oxygen or gas mixtures including oxygen are conventionally used. However, exposure of a layer of a fluorinated organic polymer such as AF4 to an RIE plasma conventionally used for organic materials, results in plasma surface damage leading to reduced thermal stability of the etched AF4 surface.
What is needed is a way to minimize RIE etch damage so that low dielectric constant organic polymer insulators can be readily integrated with typical semiconductor fabrication processes.
SUMMARY
A method of limiting surface damage during reactive ion etching of an organic polymer layer on a semiconductor substrate combines particular choices of process gases and plasma conditions with a post-etch passivation treatment. According to the method, a low density plasma etcher is used with a process gas mixture of one or more of an inert gas such as argon, helium, or nitrogen; methane; hydrogen; and oxygen, where the percentage of oxygen is up to about 5%. Gas mixtures containing between about 2% and about 4.5% oxygen, about 3% methane, and the remainder an inert gas are used in the method. A second example is a mixture that is 75% nitrogen and 25% hydrogen. The ion density of the low density plasma is between about 10
9
and about 10
10
ions/cm
3
. Typically a parallel plate plasma etcher is used.
The reactive ion etching is followed by a post-etch passivation treatment in which hydrogen or a mixture of greater than 50% hydrogen in nitrogen is flowed over the etched layer at a temperature between about 350° C. and 450° C. The method limits surface damage in reactive ion etching of fluorinated organic polymer layers such as films formed from parylene AF4, and layers of poly(arylene ethers) and TEFLON®.


REFERENCES:
patent: 4357203 (1982-11-01), Zelec
patent: 5567271 (1996-10-01), Chu et al.
patent: 5660682 (1997-08-01), Zhao et al.
patent: 6001539 (1999-12-01), Lyu et al.
patent: 10209118 (1998-08-01), None
“Elements of Materials Science & Engineering”; Van Vlack; Addison-Wesley Publishing Co.; Reading, Mass; 4th. ed.; ©1980; pp. 524, 413.*
“Hydrogen Plasma Removal of Post-RIE Residue For Backend Processing”; Jun. 17, 1999; J. Elect., Soc., 146(6), pp. 2318-2321.*
Wolf et al., “Dry Etching For VLSI Fabrication”,Silicon Processing for the VLSI Eravol. 1, Chapter 16, pp. 539-581, 1986.

Affiliated with

Also associated with

Rating

Method of minimizing reactive ion etch damage of organic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of minimizing reactive ion etch damage of organic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of minimizing reactive ion etch damage of organic... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2545473