Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-02-28
2006-02-28
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S267000, C438S596000
Reexamination Certificate
active
07005349
ABSTRACT:
A method of manufacturing a twin-ONO-type SONOS memory using a reverse self-alignment process, wherein an ONO dielectric layer is formed under a gate and physically separated into two portions using a reverse self-alignment process irrespective of photolithographic limits. To facilitate the reverse self-alignment, a buffer layer and spacers for defining the width of the ONO dielectric layer are adopted. Thus, the dispersion of trapped charges during programming and erasing can be appropriately adjusted, thus improving the characteristics of the SONOS. The present invention prevents the redistribution of charges in time after the programming and erasing operations.
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Han Jeong-uk
Kang Sung-taeg
Lee Jong-duk
Lee Yong-kyu
Park Byung-gook
Chaudhari Chandra
Lee & Morse P.C.
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