Method of manufacturing silicon carbide semiconductor device...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S268000

Reexamination Certificate

active

06482704

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of Japanese Patent Applications No. 11-328478 filed on Nov. 18, 1999, and No. 2000-310865 filed on Oct. 11, 2000, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a silicon carbide semiconductor device in which an oxide film is formed on a surface of silicon carbide. More particularly, the invention is well suited for application to insulated-gate field effect transistors, especially a vertical power MOSFET for high power.
2. Description of the Related Art
Heretofore, in field effect transistors of insulated gate type employing silicon carbide, it has been desired to lower ON-resistances.
A field effect transistor of insulated gate type intended to lower the ON-resistance has been proposed in, for example, the official gazette of Japanese Patent Laid-Open No. Hei. 10-308510. The conventional field effect transistor of insulated gate type disclosed in the official gazette is such that a semiconductor layer formed under a gate oxide film is used as an accumulation layer, whereby the MOSFET is operated in an accumulation mode inducing a channel, without inverting the conductivity type of a channel forming layer, so as to make a channel mobility higher than in an inversion mode. It is desired, however, to lower the ON-resistances of MOSFETs still further.
SUMMARY OF THE INVENTION
In view of the above, the present invention has for its object to attain further lowering of the ON-resistance in an insulated gate type field effect transistor formed from silicon carbide.
According to one aspect of the present invention, an oxide film is formed on a semiconductor layer made of silicon carbide by a thermal oxidation treatment that is performed at conditions under which a recrystallization reaction between silicon dioxide (SiO
2
) and carbon (C) occurs to produce silicon carbide (SiC) with a Gibbs free energy G
3
being negative. The recrystallization reaction is expressed by a chemical formula of:
SiO
2
+3C→SiC+2CO+G
3
.
According to another aspect of the present invention, when an oxide film is formed on a semiconductor layer made of silicon carbide by a thermal oxidation treatment, an increase in thickness of the oxide film formed after performing the thermal oxidation treatment is controlled to be 6 nm at most.
According to another aspect of the present invention, after an oxide film is formed by a thermal oxidation treatment, an annealing treatment is performed at conditions under which the recrystallization reaction represented by the chemical formula of SiO
2
+3C→SiC+2CO+G
3
occurs with a Gibbs free energy G
3
being negative.
According to still another aspect of the present invention, after an oxide film is formed on a semiconductor layer by deposition, a thermal oxidation treatment is performed at a temperature in a range of 1200° C. to 1400° C. In any aspect of the invention as described above, the ON-resistance can be lowered significantly. The reasons and detailed explanations are made hereinafter.


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Suzuki et al., “Thermal Oxidation of SiC and Electrical Properties of Al-SiO2-SiC MOS Structure”,Japanese Journal of Applied Physics, vol. 21, No. 4 (Apr. 1992), pp. 579-585.
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