Method of manufacturing semiconductor integrated circuit

Details Method of manufacturing semiconductor integrated circuit Method of manufacturing semiconductor integrated circuit

2007-12-05

2009-10-13

Nhu, David (Department: 2895)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S238000, C438S381000, C257SE21170, C257SE21229, C257SE21245, C257SE21645, C257SE21646

Reexamination Certificate

active

07601579

ABSTRACT:
A method of manufacturing a semiconductor integrated circuit including a logic part and a memory array part, the logic part having N-type and P-type FETs, and the memory array part having N-type and P-type FETs, includes the steps of forming N-type and P-type FETs constituting the logic part and the memory array part, thereafter sequentially forming a first insulation film having a tensile stress and a second insulation film on the whole surface, selectively removing the second insulation film and the first insulation film present on the upper side of the region of the P-type FET constituting the logic part, then forming a third insulation film having a compressive stress on the whole surface, and thereafter selectively removing the third insulation film present on the upper side of the region of the N-type FET constituting the logic part and the third insulation film present on the upper side of the regions of the N-type and P-type FETs constituting the memory array part.

REFERENCES:
patent: 6538278 (2003-03-01), Chau
patent: 6602748 (2003-08-01), Watani
patent: 6982196 (2006-01-01), Belyansky
patent: 7439118 (2008-10-01), Kanno

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