Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-04-20
2001-12-04
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S253000, C438S398000
Reexamination Certificate
active
06326258
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method of manufacturing a semiconductor device having a high dielectric constant thin film capacitor. More particularly, the present invention relates to a method of manufacturing a semiconductor memory device having a high dielectric constant thin film capacitor in which a leak current characteristic is improved.
BACKGROUND OF THE INVENTION
As a semiconductor memory device becomes highly integrated, an area for forming each capacitor in the semiconductor device becomes small and it becomes difficult to obtain a desired capacitor area. Therefore, recently, a high dielectric constant thin film capacitor is researched in which high dielectric constant material comprising BST, i.e, Ba
x
Sr
1−x
TiO
3
(0≦x≦1); PZT, i.e., PbZr
1−y
Ti
y
O
3
(0≦y≦1); and the like is used as a material of a dielectric film, and noble metal is used as upper and lower electrodes.
Here, a description will be made on an example of a conventional method of manufacturing such high dielectric constant thin film capacitor. First, on a silicon substrate in which a MOSFET is fabricated by a known method, an insulating film comprising SiO
2
is formed by using a CVD method and the like. Then, a capacitor contact plug comprising polysilicon is formed in the insulating film. A barrier layer made of a stacked structure of TiN/Ti and a lower electrode layer comprising noble metal such as ruthenium (Ru) are formed by using a sputtering method. The barrier layer and the lower electrode layer are then patterned into a desired shape by using RIE (Reactive Ion Etching). Then, a thin film of (Ba, Sr)TiO
3
is formed on whole surface of the substrate by using an ECR (Electron Cyclotron Resonance)—MOCVD (Metal Organic Chemical Vapor Deposition) method, at a substrate temperature of 200 degrees Celsius. Thereafter, the (Ba, Sr)TiO
3
film is crystallized by an RTA (Rapid Thermal Annealing) process in nitrogen atmosphere. An upper electrode layer comprising noble metal such as Ru and the like is formed and a (Ba, Sr)TiO
3
thin film capacitor is obtained. Then, a process for surface protection such as formation of a passivation film and the like is performed by using a known method.
After forming a gate oxide film on a silicon substrate, various process steps are performed to fabricate a transistor. During such various process steps, there is a possibility that structural defects arise between the silicon substrate and the gate oxide film, or that chemical bonds between silicon and oxygen in the gate oxide film are broken. Therefore, there is a possibility that transistor characteristics are deteriorated. In order to recover or improve transistor characteristics, after forming a semiconductor memory device, the semiconductor memory device is usually annealed at a temperature approximately between 300 and 400 degrees Celsius, in an atmosphere of a mixed gas of hydrogen and nitrogen in which a concentration of hydrogen is 3 to 50 percent.
However, the inventor of the present invention has found that, when such annealing process is performed in an atmosphere including hydrogen, local crystallinity is deteriorated at interfaces between the upper electrode and the BST thin film and between the lower electrode and the BST thin film in the capacitor and, thereby, a leak current of the capacitor increases.
FIG. 5
shows relationship between voltages applied to capacitors, i.e., upper electrode voltages with respect to lower electrode voltages, and leakage current densities of the capacitors, i.e., densities of leakage current between the upper electrodes and the lower electrodes, when capacitors are annealed, at a temperature of 400 degrees Celsius, in an atmosphere of mixed gases of hydrogen and nitrogen in which concentrations of hydrogen are 5 percent, 20 percent and 50 percent.
FIG. 5
, also shows relationship designated as “as-fab.” between voltages applied to a capacitor and leakage current densities of the capacitor, when the capacitor is not annealed after fabrication. As can be seen from
FIG. 5
, in case the capacitor is annealed in an atmosphere including hydrogen, the leakage current increases in every hydrogen concentration, when compared with the case the capacitor is not annealed.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a method of manufacturing a semiconductor device having a capacitor in which a leak current characteristic is improved.
It is another object of the present invention to provide a to a method of manufacturing a semiconductor memory device having a high dielectric constant thin film capacitor in which a leak current characteristic is improved
It is still another object of the present invention to provide a method of manufacturing a semiconductor memory device having a high dielectric constant thin film capacitor in which a leakage current of the capacitor can be reduced even when the capacitor is annealed in an atmosphere including hydrogen to improve transistor characteristics, after fabricating the capacitor.
It is still another object of the present invention to obviate the disadvantages of the conventional method of manufacturing a semiconductor memory device.
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a capacitor in which a lower electrode made of noble metal, a high dielectric constant insulating film and an upper electrode made of noble metal are sequentially stacked, the method comprising: after forming the capacitor, performing a first annealing process in an atmosphere including hydrogen; and after performing the first annealing process, performing a second annealing process in an atmosphere which does not include hydrogen at a temperature equal to or lower than a temperature of the first annealing process.
In this case, it is preferable that the semiconductor device is a semiconductor memory device.
It is also preferable that the first annealing process is performed in a mixed gas including hydrogen.
It is further preferable that a hydrogen content in the mixed gas is 3-50 percent.
It is advantageous that the first annealing process is performed in a mixed gas of hydrogen and nitrogen.
It is also advantageous that the second annealing process is performed in an atmosphere including at least one selected from a group consisting of nitrogen gas, inert gas and oxygen gas.
It is further advantageous that the second annealing process is performed in nitrogen gas.
It is preferable that the second annealing process is performed in a vacuum condition.
It is also preferable that the high dielectric constant insulating film comprises a material selected form a group consisting of Ba
x
Sr
1−x
TiO
3
(0≦x≦1) and PbZr
1−y
Ti
y
O
3
(0≦y≦1).
It is further preferable that each of the lower electrode and the upper electrode comprises noble metal selected from a group consisting of Ru, Ir and Pt.
It is advantageous that the first and second annealing processes are performed after forming the capacitor and forming aluminum bit wiring conductors.
According to another aspect of the present invention, there is provided a method of manufacturing a. semiconductor device comprising: preparing a silicon substrate; forming at least a gate electrode and source/drain regions on the silicon substrate to form a MOS transistor; forming an interlayer insulating film on the silicon substrate so as to cover the MOS transistor; selectively removing the interlayer insulating film to form an opening; filling the opening with conductive material to form a contact plug; forming a lower electrode layer of noble metal on the interlayer insulating film including the contact plug, the lower electrode layer being electrically coupled with at least one of the source/drain regions via the contact plug; forming a high dielectric constant insulating film on the lower electrode layer; forming an upper electrode layer of noble metal on the high dielectric constant insulating film, the lower electrode lay
Dang Trung
NEC Corporation
Sughrue & Mion, PLLC
LandOfFree
Method of manufacturing semiconductor device having thin... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device having thin..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device having thin... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2570323