Method of manufacturing semiconductor device having stacked gate

Details Method of manufacturing semiconductor device having stacked gate Method of manufacturing semiconductor device having stacked gate

1997-10-16

1998-11-24

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438303, 438305, H01L 2126

Patent

active

058406093

ABSTRACT:
A method for manufacturing a semiconductor device having a stacked gate electrode structure of self-aligned polysilicon-metal, which is capable of minimizing the variation in structural and electrical characteristics of the gate electrode, while utilizing the manufacturing process of forming a conventional silicone semiconductor memory device, is disclosed. According to the method for manufacturing a semiconductor device of the present invention, the conventional technique generally used in the manufacturing process of forming the silicon semiconductor device can be effectively utilized. Further, an excessive etch loss in the oxide layer can be restrained by using the oxide spacer of the self-aligned oxide layer in forming the metal layer at the gate electrode structure. Furthermore, it has an advantageous effect that the stable electrical characteristics of the resulting device can be obtained by using the polysilicon layer as a basic constituting material of the gate electrode thereof.

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patent: 5625217 (1997-04-01), Chau et al.

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