Method of manufacturing semiconductor device having sidewall...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S230000, C438S265000, C438S595000

Reexamination Certificate

active

06232192

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates a semiconductor device and a method of manufacturing the device, and more specifically, to a semiconductor device with a field-effect transistor having an improved current drivability and a method of manufacturing such a device.
2. Description of the Background Art
As an example of a conventional semiconductor device, a semiconductor device having a field-effect transistor will be described below in relation to the drawings. As seen from
FIG. 21
, a pair of source/drain diffusion regions
105
a
,
105
b
positioned at a prescribed interval are formed on a surface of a silicon substrate
101
. On the region of silicon substrate
101
located between the pair of source/drain diffusion regions
105
a
,
105
b
a gate electrode
104
a
is formed, with a gate oxide film
103
a
formed therebetween. Gates sidewall oxide films
106
a
,
106
b
are formed, one on each side surface of gate electrode
104
a
. A source/drain electrode
107
a
is formed on the surface of a source/drain diffusion region
105
a
. Moreover, a source/drain electrode
107
b
is formed on the surface of a source/drain diffusion region
105
b
. A gate upper electrode
107
c
is formed on gate electrode
104
a.
In the above-described manner, the main portion of a semiconductor device having a field-effect transistor is formed on silicon substrate
101
. The field-effect transistor is electrically isolated from another field-effect transistor (not shown) by an element isolating oxide film
102
formed in silicon substrate
101
.
Now, an example of a method of manufacturing the above-described semiconductor device will be described with reference to the drawings. As shown in
FIG. 22
, element isolating oxide film
102
is formed on the surface of silicon substrate
101
by trench isolation method. Then, as shown in
FIG. 23
, a silicon oxide film
103
is formed on the surface of silicon substrate
101
using thermal oxidation method or the like. On silicon oxide film
103
, a polysilicon film
104
is formed by CVD (Chemical Vapor Deposition) method or the like. On polysilicon film
104
, a photo resist (not shown) is provided, and a photo resist pattern
108
is formed by the use of an appropriate photolithography.
Now, as shown in
FIG. 24
, using photo resist pattern
108
as a mask, polysilicon film
104
and silicon oxide film
103
are anisotropically etched to form gate electrode
104
a
and gate oxide film
103
a
. Thereafter, photo resist pattern
108
is removed.
Next, as shown in
FIG. 25
, using gate electrode
104
a
as a mask, an impurity of a prescribed conductivity type is implanted into a surface of silicon substrate
101
using ion implantation method to form a pair of source/drain diffusion region
105
a
,
105
b
, respectively. Then, as shown in
FIG. 26
, a silicon oxide film
106
is formed on silicon substrate
101
to cover gate electrode
104
a
by CVD method.
Next, as shown in
FIG. 27
, silicon oxide film
106
is etched anisotropically to form gate sidewall oxide films
106
a
,
106
b
, each of which is formed respectively on each side surface of gate electrode
104
a
. Then, as shown in
FIG. 28
, silicon is epitaxially grown selectively on gate electrode
104
a
and source/drain diffusion regions
105
a
,
105
b
by epitaxial growth method to form gate upper electrode
107
c
and source/drain electrodes
107
a
,
107
b
, respectively. In this manner, the main portion of the semiconductor device having the field-effect transistor shown in
FIG. 21
is completed.
In recent years, miniaturization of field-effect transistors has been promoted in order to keep up with the higher degrees of integration achieved in semiconductor devices. As a field-effect transistor is miniaturized, its gate length is reduced, which leads to a lower threshold voltage, causing the so-called short-channel effect leading to the incorrect operation of the field-effect transistor. Conventionally, in order to prevent the short-channel effect in such a field-effect transistor, the film thickness of the gate oxide film has been reduced, or the depth of a source/drain region (or the depth of junction) has been made smaller. With a smaller depth of the source/drain region, however, the electrical resistance (sheet resistance) in the source/drain region cannot be sufficiently lowered, and the amount of the current flowing through the source/drain region becomes smaller. As a result, problems such as lowering of the current drivability in the field-effect transistor arise, leading to a decreased operation speed. Conventionally, in order to prevent such problems, conductive layers, i.e. source/drain electrodes
107
a
,
107
b
, are formed on the surfaces of the source/drain regions to reduce the sheet resistance of the source/drain regions, thereby ensuring the current drivability of the field-effect transistor.
In the above-described semiconductor device, however, source/drain electrodes
107
a
,
107
b
were not formed on the portions (extension portions E) located beneath gate sidewall oxide films
106
a
,
106
b
on the surfaces of source/drain diffusion regions
105
a
,
105
b
. Therefore, it was impossible sufficiently to reduce the sheet resistance of source/drain diffusion regions
105
a
,
105
b
in extension portions E. Consequently, further improvement in the current drivability of the field-effect transistor was limited.
SUMMARY OF THE INVENTION
The present invention was made to solve the above problems. An object of the present invention is to provide a semiconductor device having an improved current drivability. Another object of the present invention is provide a method of manufacturing such a semiconductor device.
According to one aspect of the present invention, the semiconductor device is provided with a semiconductor substrate having a main surface, an electrode, a pair of conductive regions, and sidewall insulating films. The electrode is formed on the main surface of the semiconductor substrate with an insulating film therebetween. The pair of conductive regions are formed on the semiconductor substrate such that the conductive regions sandwich the electrode from both sides. The sidewall insulating films are formed one on each side surface of the electrode, and recessed portions are formed exposing the main surface of the semiconductor substrate. Further, the pair of conductive regions include impurity regions respectively formed on the main surface of the semiconductor substrate such that the impurity regions sandwich the electrode from both sides, and conductive layers formed on the impurity regions to fill the recessed portions.
According to this construction, a field-effect transistor (simply referred to as a “transistor” below) including an electrode and a pair of conductive regions is formed on the semiconductor substrate. In the transistor, recessed portions exposing the main surface of the semiconductor substrate are formed in the sidewall insulating films provided one on each side surface of the electrode. Moreover, conductive layers in the pair of conductive regions are formed on the impurity regions to fill the recessed portions. Therefore, a conductive layer is also formed between the sidewall insulating film and the impurity region located beneath the sidewall insulating film. As a result, in comparison with the construction of a conventional semiconductor device in which a conductive layer is not formed between the sidewall insulating film and the impurity region, the sheet resistance of the conductive region can be further reduced. Consequently, the amount of current that flows through the conductive regions increases, leading to an improved current drivability of the field-effect transistor as well as an improved operation speed, among others, of the transistor.
The semiconductor substrate, preferably, is a silicon single crystal substrate, and the conductive layer is epitaxially grown silicon or silicon germanium.
In this case, the conductive layer can be easily formed on the impurity region in a

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing semiconductor device having sidewall... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing semiconductor device having sidewall..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device having sidewall... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2552228

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.