Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-03-16
2009-08-18
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21507, C257SE21588, C257SE21627, C257SE21641
Reexamination Certificate
active
07575993
ABSTRACT:
To provide a method of forming a wiring for the purpose of providing a semiconductor device, which is superior in reliability and cost performance. Further, to provide methods of manufacturing a semiconductor device and a display device by using the method of forming the wiring according to the present invention. According to the present invention, when a wiring material and the like is directly patterned on a substrate mainly having an insulating surface by droplet discharging method, a wiring is formed at a position including at least an opening in contact with an underlying portion on an insulating film provided with the opening by dropping a liquid droplet containing a conductive composition by droplet discharging method. By heating the substrate with the wiring formed thereon, a surface of the wiring on the opening and a surface of the wiring other than the wiring on the opening are approximately leveled, and the opening is filled.
REFERENCES:
patent: 5132248 (1992-07-01), Drummond et al.
patent: 6294401 (2001-09-01), Jacobson et al.
patent: 6362507 (2002-03-01), Ogawa et al.
patent: 6514801 (2003-02-01), Yudasaka et al.
patent: 6599582 (2003-07-01), Kiguchi et al.
patent: 6674106 (2004-01-01), Tanaka et al.
patent: 6713389 (2004-03-01), Speakman
patent: 6794220 (2004-09-01), Hirai et al.
patent: 6810814 (2004-11-01), Hasei
patent: 6877853 (2005-04-01), Kiguchi et al.
patent: 6961111 (2005-11-01), Kuramasu
patent: 7114802 (2006-10-01), Kiguchi et al.
patent: 7192859 (2007-03-01), Yamazaki et al.
patent: 2002/0070382 (2002-06-01), Yamazaki et al.
patent: 2003/0054653 (2003-03-01), Yamazaki et al.
patent: 2003/0059987 (2003-03-01), Sirringhaus et al.
patent: 2003/0083203 (2003-05-01), Hashimoto et al.
patent: 2003/0197754 (2003-10-01), Nakamura
patent: 2004/0147066 (2004-07-01), Yamazaki et al.
patent: 2004/0147113 (2004-07-01), Yamazaki et al.
patent: 2004/0253835 (2004-12-01), Kawase
patent: 2005/0078158 (2005-04-01), Magdassi et al.
patent: 2005/0197031 (2005-09-01), Yamazaki et al.
patent: 2005/0206313 (2005-09-01), Yamazaki et al.
patent: 2005/0208863 (2005-09-01), Yamazaki et al.
patent: 2005/0214480 (2005-09-01), Garbar et al.
patent: 0 930 641 (1999-07-01), None
patent: 5-36683 (1993-02-01), None
patent: 5-338187 (1993-12-01), None
patent: 6-182980 (1994-07-01), None
patent: 6-237063 (1994-08-01), None
patent: 10-270442 (1998-10-01), None
patent: 10-270843 (1998-10-01), None
patent: 11-204529 (1999-07-01), None
patent: 11-340129 (1999-12-01), None
patent: 2001-52864 (2001-02-01), None
patent: 2002-26229 (2002-01-01), None
patent: 2002-324966 (2002-11-01), None
patent: 2002-359246 (2002-12-01), None
patent: 2003-133691 (2003-05-01), None
Takayama Toru
Yamaguchi Tetsuji
Yamazaki Shunpei
Cook Alex Ltd.
Sarkar Asok K
Semiconductor Energy Laboratory Co,. Ltd.
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