Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

2006-10-31

2006-10-31

Norton, Nadine (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S700000, C438S758000, C438S771000

Reexamination Certificate

active

07129175

ABSTRACT:
A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.

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patent: 2002/0137323 (2002-09-01), Loboda
Higashi, K. et al., “A Manufacturable Copper/Low-k SiOC/SiCN Process Technology for 90nm-node High Performance eDRAM”, Proceeding of the IEEE2002 International Interconnect Technology Conference, pp. 15-17, (Jun. 2002).
Fayolle, M. et al., “Intergration of Cu/SiOC in Dual Damascene interconnect for 0.1 μm technology using a new SiC material as dielectric barrier”, Proceeding of the IEEE2002 International Interconnect Technology Conference, pp. 39-41, (Jun. 2002).
Kim, T.S. et al., “Integration of Organosilicate Glasses (OSGs) In High Performance Copper Interconnects”, Advanced Metallization Conference 2001, pp. 25-31, (Oct. 2001).
Fayolle, M. et al., “Overcomming resist poisoning issue during Si-O-C dielectric integration in Cu Dual Damascene interconnect for 0.1 μm technology”, pp. 509-513, (Oct. 2001).
Lin, J.C. et al., “Via First Dual Damascence Integration of nanoporous Ultra Low-k Material”, IEEE2002 International Interconnect Technology Conference, pp. 48-50, (Jun. 2002).

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