Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-06-18
2004-06-29
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S275000, C438S296000, C438S763000, C438S981000
Reexamination Certificate
active
06756263
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device including trench isolation for electrically isolating elements and a transistor having a gate oxide film of at least two different thicknesses, and a method of manufacturing the same.
2. Description of the Background Art
When trench isolation is used for element isolation in place of conventional LOCOS (Local Oxidation of Silicon), a trench is formed in a semiconductor substrate and an oxide film is buried in this trench for example by CVD (Chemical Vapor Deposition) or the like. An element such as an MOS (Metal Oxide Semiconductor) transistor or the like is then formed on the main surface of the silicon substrate.
An oxidation process is essential after formation of trench isolation in a manufacturing process of semiconductor device. When an MOS transistor is formed on a main surface of a silicon substrate, for example, the main surface of the semiconductor substrate is thermally oxidized after formation of the trench isolation, to form a gate oxide film.
Here, an oxidizing agent diffuses into a silicon oxide film buried in the trench and reacts with silicon at a trench inner wall, causing the trench inner wall to be oxidized. The silicon at the trench inner wall thereby becomes a silicon oxide film. When silicon changes to a silicon oxide film in this way, the volume of the silicon oxide film is almost double the oxidized silicon.
The result is the situation equivalent to expansion of the silicon oxide film buried in the trench, so that the active region surrounding the trench suffers from compressive stress and a crystal defect is caused in the silicon substrate. Such a crystal defect increases a junction leakage current, resulting in an increased power consumption in a semiconductor device.
The aforementioned problem tends to arise when a trench isolation pitch is short and a number of oxidation processes are performed on a trench isolation region, that is, in case of a semiconductor device including a transistor having a gate oxide film of two or more different thicknesses. More particularly, the aforementioned problem is prominent in a nonvolatile semiconductor memory device requiring a high voltage transistor in a peripheral circuit, having a thick gate oxide film, and thus inevitably being subjected to a large number of oxidation processes.
Furthermore, this problem arises more prominently in a miniaturized non-volatile semiconductor memory device. More specifically, even though a non-volatile semiconductor memory device scales down, a tunnel oxide film of a cell transistor cannot be made thinner in accordance with a scaling law, in order to provide sufficient insulation for electrons accumulated in a floating gate.
Moreover, because a tunnel oxide film cannot be made thin in accordance with the scaling law, the coupling of cells inevitably becomes worse and an applied voltage required for writing and erasing tends to be higher with scaling-down. Therefore, a gate oxide film of a high voltage transistor (Vpp) of a peripheral circuit tends to be made thicker rather than thinner. This is quite different from a semiconductor device such as ASIC (Application Specific Integrated Circuit), DRAM (Dynamic Random Access Memory) or the like in which a gate oxide film is thinner with scaling-down.
On the other hand, the trench isolation pitch naturally becomes narrower due to miniaturization, and the device is more susceptible to the stress caused by oxidation. In other words, when non-volatile semiconductor memory devices are scaled down, a crystal defect is more easily caused in the silicon substrate, because the amount of oxidation cannot be reduced and in addition the isolation pitch is narrowed. Therefore, such a process is desired that assures the required gate oxide film thickness and can reduce the substantial amount of oxidation in the trench isolation as compared with a conventional technique.
SUMMARY OF THE INVENTION
The present invention is made to solve the aforementioned problems. It is an object of the present invention is to prevent a defect resulting from excessive oxidation of a trench isolation region in a semiconductor device having trench isolation, particularly in a non-volatile semiconductor memory device.
A semiconductor device in accordance with the present invention includes a trench isolating elements, a first transistor having a first gate oxide film having a first thickness, and a second transistor having a second gate oxide film having a second thickness greater than the first thickness and including an oxide film formed before forming the trench.
The oxide film formed before forming the trench for element isolation is thus used in a part of the relatively thick, second gate oxide film, so that the amount of oxidation applied to the trench isolation region can be reduced as compared with the case where the oxide film is formed after forming a trench.
The present invention is useful for a semiconductor device including a memory cell transistor region and a, peripheral circuit region and having a gate oxide film of two or more different thicknesses. In particular, it is useful for a non-volatile semiconductor memory device.
In one aspect of the present invention, a method of manufacturing a semiconductor device includes the following steps. A first oxide film is formed on a main surface of a semiconductor substrate. A trench is formed in an element-isolating region of the semiconductor substrate using the first oxide film as a mask. The first oxide film on a first region is removed while the first oxide film is left on a second region of the semiconductor substrate. A second oxide film is formed on the first and second regions. A gate of a first transistor is formed on the first region with the second oxide film interposed. A gate of a second transistor is formed on the second region with the first and second oxide films interposed. Here, “using the first oxide film as a mask” includes using the first oxide film as a part of the mask.
As described above, the first oxide film formed before forming the element-isolating trench is used as a part of the gate insulating film of the second transistor, so that the amount of the oxidation applied to the trench isolation region can be reduced as compared with the case where the first oxide film is formed after forming the trench.
In another aspect of the present invention, a method of manufacturing a semiconductor device includes the following steps. A first oxide film is formed on a main surface of a semiconductor substrate. A trench is formed in an element-isolating region of the semiconductor substrate using the first oxide film as a mask. The first oxide film on a second region of the semiconductor substrate is removed while the first oxide film on a first region is left. An oxidation resistant film is formed on the first oxide film left on the first region. A second oxide film is formed on the second region with the first region covered with the oxidation resistant film. The first oxide film and the oxidation resistant film on the first region are removed. A third oxide film is formed on the first and second regions. A gate of a first transistor is formed on the first region with the third oxide film interposed. A gate of a second transistor is formed on the second region with the second and third oxide films interposed. Here, in the present specification, “an oxidation resistant film” refers to a film having an effect of preventing an oxidizing agent from diffusing into the underlying layer at the time of oxidation as compared with a general silicon oxide film.
In this aspect, the second oxide film is formed on the second region with the first region covered with the oxidation resistant film. Therefore, the trench isolation region in the first region can be prevented from being oxidized at the time of forming the second oxide film.
The oxidation resistant film described above is, for example, a film including
Booth Richard A.
Rensas Technology Corp.
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