Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2003-07-03
2004-12-28
Berry, Renee R. (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S585000, C438S586000, C438S587000, C438S595000, C438S763000, C438S780000
Reexamination Certificate
active
06835670
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a trench element-isolation structure in a semiconductor device.
2. Description of the Background Art
A trench element-isolation structure is known as an exemplary element-isolation structure in a semiconductor device. Japanese Patent Laying-Open Nos. 2001-93970 and 59-182537 disclose a method of manufacturing a semiconductor device having a trench element-isolation structure.
Japanese Patent Laying-Open No. 2001-93970 describes a method of forming a trench element-isolation structure as follows. An underlying silicon oxide film, a silicon nitride film, and an antireflection coating are formed on a semiconductor substrate, and these films are patterned using a resist as a mask. Thereafter, the resist and the antireflection coating are removed, and a trench is formed in the semiconductor substrate using the silicon nitride film and the silicon oxide film as a mask. The trench is filled with a silicon oxide film.
Japanese Patent Laying-Open No. 59-182537 describes a method of forming a trench element-isolation structure as follows. An oxide film, a silicon nitride film, and a silicon oxide film are formed on a silicon substrate, and these films are patterned into a prescribed shape. The patterned oxide film, silicon nitride film and silicon oxide film are used as a mask to etch the silicon substrate to form a trench. The trench is filled with boro-silicate glass (BSG).
In the method of manufacturing a semiconductor device described in Japanese Patent Laying-Open Nos. 2001-93970 and 59-182537 as described above, a trench is formed by etching using a silicon nitride film and a silicon oxide film as a mask. A trench may be formed by etching with an antireflection coating left on a silicon nitride film (Si
3
N
4
film).
When etching for forming a trench is performed with an antireflection coating left on a silicon nitride film, the antireflection coating usually disappears in the etching. Depending on a material of the antireflection coating, however, an etching rate (a sputtering etching rate) in a facet portion is greater than an etching rate (a reactive ion etching rate) in a flat portion in the antireflection coating. As a result, an upper end corner portion of the antireflection coating is rounded off and an upper end corner portion of the silicon nitride film is also rounded off, accordingly.
In the etching described above, an etching gas (etchant) also collides with this rounded, upper end corner portion. After colliding with the upper end corner portion of the rounded silicon nitride film, a part of etching gas has its direction of travel changed toward a trench sidewall and collides with the trench sidewall. Therefore, the amount of the etching gas that collides with the trench sidewall is increased, and the trench sidewall is unnecessarily recessed. As a result, the trench sidewall assumes a concave shape or a bowing shape in the central portion or in the vicinity of the bottom portion in its height direction. If a trench having such a shape is filled with an insulating film, a space portion is easily formed in the insulating film, which may cause the trench to be poorly filled.
SUMMARY OF THE INVENTION
The present invention is made to solve the aforementioned problem and is aimed to provide a method of manufacturing a semiconductor device in which an upper end corner portion of a mask in trench formation is less likely to be rounded off, thereby improving filling of a trench with an insulating film.
A method of manufacturing a semiconductor device in accordance with the present invention includes the following steps. A silicon oxide film, a silicon nitride film, and an antireflection coating made of a material containing oxygen atoms are successively formed on a semiconductor substrate. The silicon oxide film, the silicon nitride film, and the antireflection coating are patterned. A reduction treatment for reducing an amount of oxygen atoms is performed on the antireflection coating. The antireflection coating after the reduction treatment, the silicon nitride film, and the silicon oxide film are used as a mask to etch the semiconductor substrate, thereby forming a trench in a main surface of the semiconductor substrate. The trench is filled with an insulating film.
In accordance with the present invention, the etching rate in the flat portion of the antireflection coating is increased, for example, by changing the film property of the antireflection coating, so that the upper end corner portion of the antireflection coating is less likely to be rounded off in etching for forming a trench. Therefore, the upper end corner portion of the silicon nitride film is also less likely to be rounded off in the etching, resulting in a desired shape of the trench. As a result, the filling of the trench with the insulating film is improved.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 6417083 (2002-07-01), Mori
patent: 59-182537 (1984-10-01), None
patent: 2001-93970 (2001-04-01), None
Berry Renee R.
Renesas Technology Corp.
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