Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-03-03
2004-07-20
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S954000, C438S775000
Reexamination Certificate
active
06764902
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, particularly to an art to be effectively applied to a semiconductor device comprising a nonvolatile memory device including an insulator film formed between a floating gate electrode and a control gate electrode. The present invention is especially directed to a nonvolatile memory (including, e.g., stacked type memories; or split type memories; or stacked type memories optionally having an erase gate in addition to the control and floating gates; or split type memories optionally having an erase gate in addition to the control and floating gates, with insulator films between the various gates), such as a flash memory.
A semiconductor device uses a nonvolatile memory device referred to as a flash memory. Because the flash memory is superior in portability and impact resistance and electrically allows on-board bulk erasing, it is anticipated as a file memory of a future compact portable data unit.
The flash memory is provided with a memory cell array section constituted by arranging a plurality of memory cells using a nonvolatile memory device as a memory unit like a matrix. The nonvolatile memory device is constituted on the surface of a semiconductor substrate made of, e.g., single crystalline silicon.
The above nonvolatile memory device mainly comprises a semiconductor substrate serving as a channel region, a first gate dielectric film, a floating gate electrode, a second gate dielectric film, a control gate electrode, and a pair of semiconductor regions serving as a source region and a drain region (also referred to as impurity diffusion layers). The nonvolatile memory device injects electrons into the floating gate electrode of the semiconductor substrate by applying a positive voltage to the control gate electrode of the semiconductor substrate, and stores one-bit data (“0” or “1”) in accordance with the difference in the threshold voltages of memory cell transistors. Moreover, the first gate dielectric film denotes a tunnel dielectric film formed between the semiconductor substrate and the floating gate electrode. Furthermore, the second gate dielectric film denotes, e.g., an interpoly dielectric film formed between the floating gate electrode and the control gate electrode.
In the case of the nonvolatile memory device, the floating gate electrode and the control gate electrode are each respectively formed from a polycrystalline silicon film, and the first gate dielectric film and the second gate dielectric film are respectively formed from a silicon oxide (SiO
2
) film. A silicon oxide film serving as the first gate dielectric film is formed by applying thermal oxidation to the surface of a semiconductor substrate made of single crystalline silicon, and a silicon oxide film serving as the second gate dielectric film is formed by applying thermal oxidation to the surface of a floating gate electrode made of a polycrystalline silicon film.
The silicon oxide film formed on the surface of the floating gate electrode made of the polycrystalline silicon film has a low breakdown voltage and is inferior in retention capability compared to a silicon oxide film formed on the surface of a semiconductor substrate made of single-crystal silicon. Therefore, in the case of flash memories of 4 [Mbit] onward, as the second gate dielectric film there is formed, in place of the single-layer silicon oxide film, a composite film, so-called an ONO (Oxide/Nitride/Oxide) film, obtained by superimposing a silicon oxide film, a silicon nitride (Si
3
N
4
) film, and a silicon oxide film in order on the floating gate electrode. This is because, when film thicknesses in terms of a silicon oxide film are the same, an ONO film has a small leakage current compared with a silicon oxide film. This art is discussed in “IEEE Transaction on Electron Devices, 38(1991) pp. 386-391”.
SUMMARY OF THE INVENTION
However, as the integration of a flash memory is improved, new problems occur when using an ONO film as the second gate dielectric film. One of the problems is that the process temperature following scaling of a nonvolatile memory device lowers. The ONO film is normally formed by thermally oxidizing the surface of a floating gate electrode made of a polycrystalline silicon film and thereby forming a lower silicon oxide film, then forming a silicon nitride film on the bottom silicon oxide film by a Low Pressure Chemical Vapor Deposition (LPCVD) process, and finally thermally oxidizing the surface of the silicon nitride film and thereby forming a top silicon oxide film. However, because oxidation of the silicon nitride film requires a high temperature of 900° C. or higher, it is difficult to form a shallow junction indispensable for scaling of an LSI (Large Scale Integrated Circuit), when forming a source region and a drain region and thereafter forming the second gate dielectric film, and this is a factor for interrupting improvement in the integration of a flash memory.
According to only the thermal oxidation process described above, it is possible to form a second gate dielectric film, of a single-layer silicon oxide film, even at a low temperature of approximately 800° C. However, this process has the problems that the thickness of a silicon oxide film decreases at the top end of the side wall of a floating gate electrode as the oxidation temperature is lowered, concentration of electric fields becomes remarkable at this portion, and leakage current increases. Moreover, an art is proposed in which a single-layer silicon oxide film is formed at a low temperature of approximately 750° C. by the LPCVD process, instead of the thermal oxidation process, to use the film as the second gate dielectric film of a nonvolatile memory device. By using the LPCVD process, it is possible to decrease the leakage current of a silicon oxide film compared to the case of using the thermal oxidation process. However, the effect of the LPCVD process is not enough and it is practically difficult to apply the process to a nonvolatile memory device.
Another problem is to decrease the thickness of the second gate dielectric film. A voltage Vfg to be applied to a floating gate electrode for the programming/erasing operation of a nonvolatile memory device is shown by the following expression (1).
[Numerical formula 1]
Vfg=C
2
Vcg
/(
C
1
+C
2
) (1)
In the above expression, Vcg denotes a voltage applied to a control gate electrode, C
1
denotes the capacitance of a first gate dielectric film, and C
2
denotes the capacitance of a second gate dielectric film. To efficiently supply the voltage, applied to the control gate electrode, to the floating gate electrode and lower a programming voltage, it is effective to decrease the thickness of the second gate dielectric film and increase C
2
. However, a conventional ONO film has a problem that electric charges accumulated in a floating gate electrode leak to a control gate electrode, that is, retention failure is actualized if thicknesses of top and bottom silicon oxide films are set to 5 nm or less. Moreover, to form the top silicon oxide film up to a thickness of 5 nm, it is necessary to form a silicon nitride film with a thickness of 10 nm or more in order to prevent the bottom polycrystalline silicon film, serving as a floating gate electrode, from oxidizing. Therefore, approximately 15 nm is a lower limit to the thickness of an ONO film in terms of a silicon oxide film. Because it is presently difficult to decrease the thickness of a first gate dielectric film, it is expected that a new second-gate-dielectric-film forming process is developed.
It is an object of the present invention to provide a semiconductor device (e.g., a nonvolatile memory device) having a gate dielectric film with a small leakage current at a low temperature, compared to a conventional ONO film, and having a stable operation and a sufficient retention capability even for smaller size (higher integration), and a method of manufacturing this semiconductor device.
It is another object of
Katayama Atsuko
Kobayashi Takashi
Antonelli Terry Stout & Kraus LLP
Nhu David
Renesas Technology Corp.
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