Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-08
2008-01-08
Patton, Paul E. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S304000, C257S315000
Reexamination Certificate
active
07316955
ABSTRACT:
A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate and the floating gate. Therefore, inter-cell interference can be reduced without lowering program speed.
REFERENCES:
patent: 2004/0183121 (2004-09-01), Yeh et al.
patent: 2005/0085039 (2005-04-01), Yasui et al.
patent: 1999-0048778 (1999-07-01), None
patent: 2000-0003055 (2000-01-01), None
patent: 2003-0065864 (2003-08-01), None
Chang Hee Hyun
Lee Hee Youl
Oh Sang Hyun
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Patton Paul E.
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