Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-11-29
2001-05-08
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S369000, C438S430000, C438S287000, C438S780000, C438S785000
Reexamination Certificate
active
06228702
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device provided with a microelectronic storage capacitor for storing a charge to represent information or data therein, in which capacitor a tantalum oxide (i.e., Ta
2
O
5
) film is used as a capacitance insulation film.
2. Description of the Related Art
In general, LSI (i.e., Large Scale Integration) circuits, which typify semiconductor devices, are classified into two categories, i.e., memory products and logic products. In recent years, particularly, the former (i.e., memory products) have been making a remarkable progress along with recent developments in semiconductor fabrication techniques. Further, the memory products are classified into two subcategories, i.e., DRAMs (i.e., Dynamic Random Access Memories) and SRAMs (i.e., Static Random Access Memories). Most of these memory products are constructed of the MOS (i.e., Metal Oxide Semiconductor) transistors excellent in integration density. In comparison with the SRAMs, since the DRAMs are capable of more effectively using their advantages in integration density, it is possible for the DRAMs to realize the cost reduction in manufacturing, which enhances their application to various memory units in information instruments and like equipment or systems.
In operation, since the DRAMs store charges representing data or information in their microelectronic capacitors, the individual microelectronic capacitors formed in the semiconductor substrates of the DRAMs are restricted in their occupation areas as the volume of information being stored in the DRAMs increases. Consequently, a need exists in the art for an improved technique that increases the microelectronic capacitors of the DRAMs in capacitance (i.e., electrostatic capacity). When these capacitors of the DRAMs are not sufficient in capacitance for storing charges representing the data or information, the DRAMs often fail to function properly under the influence of external noise signals and the like, which causes various types of errors, for example, typified by errors in operation various software programs and the like.
Heretofore, a silicon oxynitride (i.e., SiON) film, which is reduced in film thickness and serves as a capacitance insulation film of the microelectronic capacitor, has been obtained by nitrifying a silicon oxide (i.e., SiO
2
) film. However, in such a silicon oxynitride film thus obtained, its minimum allowable film thickness when expressed in oxide-film converted film thickness (i.e., equivalent oxide thickness) Teff is within a range of from 45 to 50 Angstroms, which is a critical point of occurrence of a tunnel current of the transistor, wherein: Teff is a capacitance per unit area of the thus formed capacitor. In order to increase the capacitor in capacitance, heretofore, various types of three-dimensional configurations of electrodes, for example such as those of box types, cylinder types, fin types, HSG (i.e., Hemispherical Grain) types, and of like types have been proposed to increase the capacitor's electrode in surface area. Although much more complicated configurations have been proposed with respect to the capacitor's electrode in the art of today, since there is a severe restriction in space in the transistor, it is hard to increase the capacitor in capacitance by increasing the surface area of the capacitor's electrode. Due to the existence of the above difficulty, widely used in the art of today in order to increase the capacitor in capacitance is a technique that utilizes a high-dielectric-constant material in the capacitance insulation film of the capacitor.
In the art of today, there are known various types of the high-dielectric-constant materials. However, in case that these materials are employed in the capacitance insulation films of the capacitors, it is necessary to previously check them in terms of: easiness in forming them into a film; and, compatibility with a pair of the electrodes disposed adjacent to opposite surfaces of the capacitance insulation film made of these materials. Consequently, a dielectric material, even when it is sufficiently high in dielectric constant, is not necessarily employed as a material for the capacitance insulation film of the capacitor. Under such circumstances, widely used in the art as a material for the capacitance insulation film of the capacitor is tantalum oxide. The dielectric constant (a value of which is within a range of from 40 to 47) of a film made of tantalum oxide (hereinafter referred to as the tantalum oxide film) is ten times higher than the dielectric constant of a silicon oxide film having been heretofore used as the capacitance insulation film in the art, and is six times higher than the dielectric constant of a silicon nitride film (i.e., Si
3
N
4
). Further, the tantalum oxide film is easier in formation. Consequently, it is possible to increase the capacitor in capacitance by using the tantalum oxide film as the capacitance insulation film in the capacitor.
FIGS. 14A
to
14
C show a conventional method for manufacturing a semiconductor device. Now, with reference to these drawings, the conventional method for manufacturing the semiconductor device will be described according to its process step.
First, as shown in
FIG. 14A
, for example, according to conventional known techniques, a P-type semiconductor substrate
51
is prepared. Then, formed in a surface of this semiconductor substrate
51
are: an N-type source region
52
and an N-type drain region
53
which is spaced apart from the source region
52
; a gate insulation film
54
formed on the surface of the substrate
51
between the source region
52
and the drain region
53
; and, a gate electrode
55
formed on the gate insulation film
54
, so that an N-type MOS transistor
56
is formed on the semiconductor substrate
51
. The thus formed N-type MOS transistor
56
is combined with a microelectronic capacitor
64
(shown in
FIG. 14C
) to form a single memory cell of the semiconductor device. In FIG.
14
A: the reference numeral
57
denotes an interlayer insulation film which covers the entire upper surface of the semiconductor device; and, the reference numeral
58
denotes an element isolating insulation film for isolating the individual regions of the semiconductor device from each other.
Next, as shown in
FIG. 14B
, a minute contact hole
59
is formed in the interlayer insulation film
57
in a position corresponding to the N-type drain region
53
(or the N-type source region
52
) of the N-type MOS transistor
56
. After that, a conductive film is formed to cover the entire upper surface of the semiconductor device including the entire inner surface of the contact hole
59
so as to be electrically connected with the N-type drain region
53
(or the N-type source region
52
). Then, the thus formed conductive film is patterned and formed into a lower electrode (i.e., storage electrode)
61
of the capacitor
64
, as shown in FIG.
14
B.
After completion of formation of the lower electrode
61
of the capacitor
64
(shown in FIG.
14
C), a tantalum oxide film
62
is formed to have an appropriate film thickness by a CVD (i.e. Chemical Vapor Deposition) process to serve as a capacitance insulation film of the capacitor
64
, as shown in FIG.
14
C. In the CVD process, the semiconductor substrate
51
is received in a reactor container of a CVD apparatus. After that, in a condition in which the interior of the reactor container is kept at a predetermined steady film forming pressure, a mixture gas containing: pentaethoxy tantalum, i.e., one of tantalum alkoxides; and, oxygen is fed to the reactor container so that film forming processes are performed inside the reactor container, whereby the tantalum oxide film
62
having a desired film thickness is formed inside the reactor container. After that, an upper electrode (i.e., plate electrode)
63
is formed on the thus formed tantalum oxid
Hayes, Soloway, Hennessey Grossman & Hage, P.C.
NEC Corporation
Rocchegiani Renzo N.
Smith Matthew
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