Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-11-07
1999-06-01
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438382, 438647, H01L 218242
Patent
active
059096179
ABSTRACT:
A method is provided for combining the process steps for forming a resistor and interconnect into one process layer, thus eliminating the need for at least two mask steps. An oxide layer is formed over a region of a polysilicon layer in which the resistor will be formed. The oxide protects the resistor from further processing. A conductive layer is then deposited at least over the exposed portion of the polysilicon layer. In a first preferred embodiment, a refractory metal forms the conductive layer. The refractory metal is sintered or heated to form silicide over the exposed portion of the polysilicon layer, and the non-silicided metal is removed. The underlying layer may be doped as desired, before or after silicidation, for the first preferred embodiment. Thus, a resistor and conductive interconnect is formed within the same layer. Also disclosed is an embodiment in which the conductive layer need not be sintered, and an embodiment in which the resistor is formed in the sidewalls of a vertical cavity.
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Batra Shubneesh
Manning H. Monte
Chang Joni
Micro)n Technology, Inc.
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