Method of manufacturing self-aligned n and p type stripes...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S138000, C438S157000, C438S176000, C438S181000, C438S185000, C438S188000, C438S197000, C438S514000, C438S286000, C257SE21336, C257SE21346

Reexamination Certificate

active

11132032

ABSTRACT:
A method is provided for obtaining extremely fine pitch N-type and P-type stripes that form the voltage blocking region of a superjunction power device. The stripes are self-aligned and do not suffer from alignment tolerances. The self-aligned, fine pitch of the alternating stripes enables improvements in on-state resistance, while ensuring that the superjunction device is fully manufacturable. Only one masking step is required to fabricate the alternating N-type and P-type stripes.

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