Method of manufacturing non-volatile semiconductor memory having

Details Method of manufacturing non-volatile semiconductor memory having Method of manufacturing non-volatile semiconductor memory having

1996-10-30

1998-12-08

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438264, H01L 21336

Patent

active

058468617

ABSTRACT:
In a method of manufacturing non-volatile semi-conductor memory including a memory cell transistor and a peripheral transistor, a floating gate and a control gate of the memory cell transistor is formed on a semiconductor substrate and a gate electrode of the peripheral transistor is formed on the semiconductor substrate. The control gate and gate electrode are covered with first and second insulating layers, respectively. A conductive layer is deposited to cover the first and second insulating layers. The conductive layer is etched back until the first and second insulating layers are exposed. An erasing gate of the memory cell transistor is formed by leaving the conductive layer on the insulating layer. A first mask layer on the second insulating layer and a second mask layer on the erasing gate is formed. The conductive layer remaining in the regions outside the masks is removed.

REFERENCES:
patent: 5070032 (1991-12-01), Yuan
patent: 5268319 (1993-12-01), Harari
IBM Technical Disclosure Bulletin, vol. 32, No. 4A, Sep. 1989, pp. 155-158, "Dielectric Spacer Formation to Eliminate Polysilicon Stringers".

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