Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-08-26
2000-09-26
Dang, Trung
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438197, 438760, 438783, 438786, 438952, H01L 21336
Patent
active
061241784
ABSTRACT:
A method for forming a MOSFET device on a semiconductor substrate is disclosed here. First, a gate oxide layer, a polysilicon layer, a metal silicide layer and a silicon oxynitride layer are formed on the semiconductor substrate in sequence. Then, the silicon oxynitride layer, the metal silicide layer, the polysilicon layer and the gate oxide layer are etched to define a gate pattern. The sidewall spacers are formed on the sidewalls of the gate structure. The source and drain areas are defined by forming the doping areas in the semiconductor substrate. Next, a non-doped dielectric layer is formed above the semiconductor substrate to cover the gate structure, the sidewall spacers and the source/drain areas. An annealing procedure is next performed about 10 to 15 minutes at a temperature of about 800 to 850.degree. C. Then, a dielectric layer is formed on said non-doped dielectric layer.
REFERENCES:
patent: 5441914 (1995-08-01), Taft et al.
patent: 5869388 (1999-02-01), Chan et al.
patent: 6025279 (2000-02-01), Chiang et al.
Chen Elmer
Chou Chien
Hsu Steve
Sung Kuan-Chou
Dang Trung
Donner Irah H.
Mosel Vitelic Inc.
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