Method of manufacturing MOS transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S301000

Reexamination Certificate

active

07135365

ABSTRACT:
First, a substrate having a plurality of NMOS transistor regions and PMOS transistor regions is provided. The substrate further includes a plurality of gate structures respectively positioned in the NMOS transistor regions and the PMOS transistor regions. A high-tensile thin film is then formed on the substrate and the plurality of gate structures. Subsequently, an annealing process is performed, and the high-tensile thin film is removed after the annealing process.

REFERENCES:
patent: 6107147 (2000-08-01), Kim et al.
patent: 2004/0262692 (2004-12-01), Hareland et al.
patent: 2005/0112817 (2005-05-01), Cheng et al.

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