Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-06-07
2008-10-14
Hoang, Quoc D (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S486000, C257SE21336, C257SE21410
Reexamination Certificate
active
07435658
ABSTRACT:
A method of manufacturing a MOS transistor is provided. A substrate having a gate structure thereon is provided. A first spacer is formed on the sidewall of the gate structure. A pre-amorphization implantation is carried out to amorphize a portion of the substrate. A doped source/drain extension region is formed in the substrate on each side of the first spacer. A second spacer is formed on the sidewall of the first spacer. A doped source/drain region is formed in the substrate on each side of the second spacer. Thereafter, a solid phase epitaxial process is carried out to re-crystallize the amorphized portion of the substrate and activate the doped source/drain extension region and the doped source/drain region to form a source/drain terminal. Finally, a post-annealing operation is performed.
REFERENCES:
patent: 6660605 (2003-12-01), Liu
patent: 6943085 (2005-09-01), Wang et al.
Chien Chin-Cheng
Wang Hsiang-Ying
Wang Yu-Ren
Yang Neng-Hui
Hoang Quoc D
J.C. Patents
United Microelectronics Corp.
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