Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-01-23
2004-08-24
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S276000, C438S289000, C438S305000, C438S306000, C438S517000, C438S527000, C438S530000, C438S542000, C438S770000
Reexamination Certificate
active
06780697
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a manufacturing method of an LDMOS transistor in which an ion-implantation process can be omitted.
A lateral double-diffused metal oxide semiconductor (LDMOS) is known as a small-sized power device having a small power consumption, and a structure and manufacturing method of the semiconductor are disclosed, for example, in Japanese Patent Application Laid-Open No. 1998-335663. In general, there are N-type and P-type LDMOSs. Here, a manufacturing method of a conventional LDMOS will be described hereinafter in terms of an example of the N-type.
Respective techniques such as oxidation, photolithography, and impurity implantation are used to implant N-type impurities such as phosphorus (P) into a predetermined region on a P-type semiconductor substrate. Subsequently, a diffusion technique is used to form an N-type well as a drain. Subsequently, techniques such as photolithography and ion-implantation are used to implant P-type impurities such as boron (B) forming a D well of the LDMOS into the N-type well, then the same resist is used to implant the N-type impurities such as arsenic (As), and the diffusion technique is used to form a P-type diffusion layer forming the D well and an N-type diffusion layer forming a source. Here, since boron (B) is a small element and has a large diffusion coefficient as compared with arsenic (As), the P-type diffusion layer is formed to be deeper than the N-type diffusion layer.
Subsequently, a LOCOS forming technique is used to form a field oxide film for isolating elements from one another, an oxidation technique is used to form a gate oxide film on an inner surface of the field oxide film, and respective techniques such as known CVD, photolithography, and etching are used to form a polysilicon electrode in a channel forming region on the gate oxide film so that the electrode extends over the N-type well, P-type diffusion layer forming the D well, and N-type diffusion layer.
Subsequently, the photolithography technique is used to perform a desired patterning, and the resist and gate electrode are used as masks to implant the N-type impurities such as phosphorus (P) into the surface in the N-type well. Moreover, the diffusion technique is used to form the N-type diffusion layer forming a reduced surface drain (RSD) in the N-type well on a region having no P-type diffusion layer forming the D well.
Subsequently, the photolithography and implantation techniques are used to implant the N-type impurities such as arsenic (As) in a region as a part of the N-type diffusion layer from which electrodes of a drain and source are extracted, and implant the P-type impurities such as boron (B) in a region from which the electrode of the D well is extracted. Furthermore, the diffusion technique is used to form the N-type and P-type diffusion layers, and finally the LDMOS is formed through contact formation, and wiring formation.
For the LDMOS formed by the aforementioned conventional method, after the N-type diffusion layer forming the source is formed, the gate oxide film is formed. Therefore, the gate oxide film on the N-type diffusion layer forming the source is formed to be thicker than the gate oxide film on the D well by accelerated oxidation. In this manner, a stepped portion is formed in a boundary having a difference in thickness in the gate oxide film in this manner. Therefore, an electric field distribution in the gate oxide film is not uniform, and there is uncertainty in reliability of pressure resistance of the gate oxide film.
SUMMARY OF THE INVENTION
The present invention may solve the aforementioned prior-art problem and provide a highly reliable semiconductor device. In the device, an accelerated oxidation during formation of a gate oxide film could be suppressed. Further, a stepped portion of the gate oxide film on a D well may be reduced.
A method of manufacturing an LDMOS transistor of the present invention comprises providing a semiconductor substrate of a first conductivity type having a well region of a second conductivity type formed on a surface of the substrate. Ions of the first conductivity type are implanted into a part of the well region with a predetermined energy. The substrate is subjected to a heat treatment so that the implanted ions are diffused to form a diffusion region of the first conductivity type on the surface of the substrate. Then, a gate oxide layer and a gate electrode are formed on the surface of the substrate. Finally, a drain region is formed on the surface of the substrate. The predetermined energy for the implantation is set so that an accelerated oxidation during a formation of the gate oxide layer is inhibited.
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Fourson George
Garcia Joannie Adelle
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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