Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-12-29
2009-12-08
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000, C438S257000, C438S593000, C438S508000, C257S314000, C257S315000, C257SE21179, C257SE21422, C257SE21680
Reexamination Certificate
active
07629213
ABSTRACT:
A method of manufacturing a flash memory device includes the steps of forming gate patterns for cells and gate patterns for select transistors over a semiconductor substrate, forming a buffer insulating layer on the resulting surface including the gate patterns, forming an insulating layer to form void in spaces between the gate patterns for cells, forming a nitride layer on the insulating layer, and forming a spacer on one side of each of the gate patterns for select transistors by a spacer etch process.
REFERENCES:
patent: 2006/0105525 (2006-05-01), Kim et al.
patent: 2007/0164343 (2007-07-01), Matsui et al.
patent: 2002-043618 (2002-02-01), None
patent: 10-2002-0011500 (2002-02-01), None
patent: 10-2002-0064589 (2002-08-01), None
patent: 10-2004-0052359 (2004-06-01), None
Cho Whee Won
Jeong Cheol Mo
Kim Jung Geun
Myung Seong Hwan
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Pham Thanh V
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