Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-11-21
2006-11-21
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S756000
Reexamination Certificate
active
07138314
ABSTRACT:
Disclosed is a method of manufacturing a flash memory device using a STI process. Isolation films of a projection structure becomes isolation films of a nipple structure by means of a slant ion implant process and a wet etching process. A polysilicon layer is removed until the tops of the isolation films through two step processes of a CMP process and an etch-back process, thus forming floating gates and gates of high voltage and low voltage transistors of a cell. As such, as the isolation films of the nipple structure and the floating gates are formed at the same time, it is possible secure the overlay margin between an active region and the floating gates regardless of the shrinkage of the flash memory device. Also, moats can be prevented from being generated at the boundary between the active regions when the isolation films of the nipple structure are formed. Further, when the floating gates and the gates of the high voltage and low voltage transistors are formed, a dishing phenomenon and an erosion phenomenon can be prevented.
REFERENCES:
patent: 6815292 (2004-11-01), Fang et al.
patent: 6939810 (2005-09-01), Sawamura
Park Sang Wook
Song Pil Geun
Dang Phuc T.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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