Method of manufacturing field effect transistor

Details Method of manufacturing field effect transistor Method of manufacturing field effect transistor

1995-05-08

1997-06-03

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438450, H01L 218234

Patent

active

056354134

ABSTRACT:
An element separating oxide film is formed in a surface of a p-type silicon substrate for separation of an element forming region. A p-type impurity diffusion region extends from the vicinity of a lower surface of the element separating oxide film to a position at a predetermined depth in the element forming region. The p-type impurity diffusion region has a peak of concentration of impurity. In the element forming region adjacent to the element separating oxide film, an n.sup.+ impurity diffusion region is formed on the surface of the p-type silicon substrate. An n.sup.- impurity diffusion region adjacent to the n.sup.+ impurity diffusion region is formed between the n.sup.+ impurity diffusion region and the p-type impurity diffusion region.

REFERENCES:
patent: 4716451 (1987-12-01), Hsu et al.
patent: 4753898 (1988-06-01), Parrillo et al.
patent: 5180682 (1993-01-01), Takeuchi
patent: 5276346 (1994-01-01), Iwai et al.
patent: 5349225 (1994-09-01), Redwine et al.
L. K. Wang et al, "On the Effects of Implantation of Ions in the MeV Energy Range into Silicon", Solid-State Electronics, vol. 29, No. 7., pp. 739-743, date unknown.
S. Isomae et al, "A New Two-Dimensional Silicon Oxidation Model", IEEE Transactions on Computer-Aided Design, vol. CAD-6, No. 3, May 1987, pp. 410-416.
Chang et al., "High-Voltage FET Integrated Circuit Process", IBM Technical Disclosure Bulletin, vol. 16, No. 5, Oct. 1973.

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