Method of manufacturing embedded...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S217000, C438S276000, C438S278000, C438S287000, C438S289000, C257SE21159, C257SE21408, C257SE21409, C257SE21613

Reexamination Certificate

active

08048747

ABSTRACT:
The present disclosure fabricates an embedded metal-oxide-nitride-oxide-silicon (MONOS) memory device. The memory device is stacked with memory layers having a low aspect ratio. The memory device can be easily fabricated with only two extra masks for saving cost. The present disclosure uses a general method for mass-producing TFT and is thus fit for fabricating NAND-type or NOR-type flash memory to be used as embedded memory in a system-on-chip.

REFERENCES:
patent: 6501111 (2002-12-01), Lowrey
patent: 7361554 (2008-04-01), Park et al.
patent: 7795677 (2010-09-01), Bangsaruntip et al.
patent: 7859066 (2010-12-01), Kito et al.
patent: 7969188 (2011-06-01), Wang
patent: 7972927 (2011-07-01), Fujitsuka et al.
patent: 7977748 (2011-07-01), Kito et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing embedded... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing embedded..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing embedded... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4288914

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.