Method of manufacturing CMOS sensor

Details Method of manufacturing CMOS sensor Method of manufacturing CMOS sensor

2000-07-17

2001-10-16

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S075000, C438S223000, C257S345000

Reexamination Certificate

active

06303421

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a complementary metal-oxide semiconductor (CMOS) sensor. More particularly, the present invention relates to a multiple implantation method for manufacturing a CMOS sensor.
2. Description of the Related Art
Charge-coupled devices (CCDs) have been the mainstay of conventional imaging circuits for converting light into an electrical signal that represents the intensity of the energy. The applications of the CCDs include monitors, transcription machines and cameras. Although CCDs have many strengths, CCDs also suffer from high costs and the limitation of the CCDs' volume. To overcome the weaknesses of CCDs and reduce costs and dimension, a CMOS photodiode device is developed. Because a CMOS photodiode device can be produced using conventional techniques, costs and the volume of the sensor can be reduced. The applications of CMOS photodiodes include PC cameras, digital cameras etc.
The photodiode is based on the theory that a P−N junction can convert light into an electrical signal. Before energy in the form of photons strikes the photodiode, there is an electric field in the P−N junction. The electrons in N region do not diffuse forward to P region and the holes in P region do not diffuse forward to N region. When enough light strikes the photodiode, the light creates a number of electron-hole pairs. The electrons and the holes diffuse forward to the P−N junction. While the electrons and the holes reach the P−N junction as a result of the effect of the inner electric field across the junction, the electrons flow to the N region and the holes flow to the P region. Thus a current is induced between the P−N junction electrodes. Ideally, a photodiode in the dark is open-circuit. In other words there is no current induced by light while the photodiode is in the dark.
FIG. 1A
is a circuit diagram of a CMOS sensor.
FIG. 1B
is a layout of the sensor cell C in the FIG.
1
A.
As shown in
FIG. 1A
, the sensor array used in the CMOS sensor is improved from a passive pixel sensor array to an active pixel sensor array. The CMOS having the active pixel sensor array cell includes at least three transistors Q
1
, Q
2
, Q
3
and a photodiode D. The reset transistor Q
1
is used to receive a reset signal A. The gate of the row access transistor Q
3
is used to receive a row access signal B. One of the source/drain regions of the transistor Q
1
is electrically coupled to the source voltage V
DD
. One of the source/drain regions of the transistor Q
2
is electrically coupled to the source voltage V
DD
. One of the source/drain regions of the transistor Q
3
is electrically coupled to the output. The sensor cell C comprises the transistor Q
1
and the photodiode D. The photodiode D can convert light into an electrical signal by using the P−N junction and the electrical signal is transferred to the transistor Q
1
.
As shown in
FIG. 1B
, the sensor cell C comprises the transistor Q
1
and the photodiode D. The transistor Q
1
comprises a gate structure
106
, source/drain regions
108
and
118
adjacent to the gate structure
106
in the substrate. The photodiode D is adjacent to the source/drain region
118
in the substrate.
The characteristic of the sensor cell is immediately relative to the concentration, the deepness and the profile of the dopants. In other words, the characteristic of the sensor cell is relative to the dose, the energy and the area coverage of the ion implantation over the sensor region.
Generally, the sensor cell is relative to the nature of the sensor region. The factors which can affect the characteristics of the sensor cell include the following:
1. The leakage current of the sensor cell caused by a defect present at the boundary between the sensor and the isolation region and the plasma damage induced by the ion implantation step;
2. The gain of the sensor cell determined by the range of the deletion region of the P−N junction, wherein the larger the range of the depletion region is, the larger the gain is;
3. The slew rate of the sensor cell determined by the deepness of the P−N junction, wherein the shallower the depth of the P−N junction is, the faster the slew rate is;
4. The uniformity of the sensor relative to the processes for manufacturing a CMOS sensor and the parameters of the sensor and the transistor; and
5. The quantum efficiency of the sensor cell determined by the minority carrier in the depletion region of the P−N junction.
FIG. 1C
is a schematic, cross-sectional view of the conventional CMOS sensor referred to in FIG.
1
B.
An isolation region
102
such as a field oxide layer is formed on the substrate
100
to define the active region for the subsequently formed CMOS sensor. A gate oxide layer
104
is formed, for example, by the thermal oxidation on a portion of the substrate
100
exposed by the isolation region
102
. An ion implantation step is used to formed lightly doped drain regions which have N-type dopants in portions of the substrate
100
exposed by the gate conductive layer
106
and the isolation region
102
. A spacer
122
is formed on the sidewall of the gate conductive layer
106
. An ion implantation step is used to formed heavily doped regions having N-type dopants in portions of the substrate
100
exposed by the gate conductive layer
106
, the spacer
122
and the isolation region
102
. Source/drain regions
108
and
118
include the heavily doped regions and the lightly doped drain regions. A patterned photoresist (not shown) is formed over the substrate
100
to expose the region for the subsequently formed sensor region. An implantation step with low energy and a high implanting dose is performed to form a sensor region
128
, which is an N-type doped region, across a portion of the source/drain region
118
and extending from the surface of the substrate
100
into the substrate
100
.
Since the P−N junction exists at the boundary between the sensor region
128
and the substrate
100
, a number of electron-hole pairs are created as the incident light strikes the P−N junction. Therefore, the incident light is converted into electrical signal.
Because the sensor region
128
is formed by performing one implantation step with low energy and a high implanting dose, the leakage usually occurs at the boundary between the sensor region
128
and the isolation region
102
and the performance of the P−N junction can not be optimized.
SUMMARY OF THE INVENTION
It is therefore an objective of the invention to provide a method of manufacturing a CMOS sensor. The invention can overcome the problem of leakage and optimize the efficiency of the sensor.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method for manufacturing a CMOS sensor. The method comprises the steps of providing a substrate having a first conductive type, wherein the substrate comprises an isolation region, an active region, a gate structure on the active region and a source/drain region having a second conductive type in the substrate. A patterned photoresist is formed over the substrate. A first doped region having the first conductive type is formed along the end of the isolation region in a portion of the substrate between the isolation region and the source/drain region. A second doped region having the second conductive type is formed across a portion of the source/drain region and extends from the surface of the substrate into the substrate. A third doped region having the second conductive type is formed under the second doped region. A fourth doped region having the first conductive type is formed under the third doped region. The patterned photoresist is removed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as clai

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