Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-04-27
2000-10-17
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438424, 438435, 438437, 438586, 438585, 438655, H01L 21336, H01L 2176, H01L 213205, H01L 2144
Patent
active
061331058
ABSTRACT:
A method of manufacturing a borderless contact hole. A substrate having a pad oxide layer and a silicon nitride layer formed thereon is provided. A trench is formed to penetrate through the silicon nitride layer and the pad oxide layer and into the substrate. A first oxide layer is formed in the trench, wherein a surface level of the first oxide layer is lower than that of the substrate. An etching stop layer is formed on the silicon nitride layer, a sidewall of the trench and the first oxide layer, conformally. A second oxide layer is formed on the etching stop layer and fills the trench. A portion of the second oxide layer, a portion of the etching stop layer, the silicon nitride layer and the pad oxide layer are removed. A portion of the second oxide layer in the trench and a portion of the etching stop layer in the trench are removed to form a recess until the surface level constructed by the remaining second oxide layer and the remaining etching stop layer is lower than a surface level of the substrate. A source/drain region is formed in the substrate adjacent to the trench. A silicide layer is formed on a surface of the source/drain region and a sidewall of the recess. A dielectric layer is formed over the substrate. A contact hole is formed to penetrate through the dielectric layer and exposes a portion of the silicide layer.
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Chen Wen-Ji
Hsu Shih-Ying
Pompey Ron
Tsai Jey
United Microelectronics Corp.
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