Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-01-02
2003-04-01
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S479000, C438S450000
Reexamination Certificate
active
06541822
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device and method for forming the same, and more particularly to a silicon-on-insulator (SOI) type semiconductor device and method forming the same, which can restrain a floating body effect (FBE) generated as elements formed on a SOI substrate are completely insulated from each other.
BACKGROUND OF THE INVENTION
To form a semiconductor device, a multitude of elements are formed on a surface layer of a silicon wafer and electrically connected with each other through lines. Accordingly, there is need for each element formed in the narrow region on the wafer to be electrically isolated from adjacent elements such that the elements are not influenced by each other. For this, in the semiconductor device, an isolation layer or impurity junction layer is commonly used.
However, as the degree to which semiconductor devices are integrated continues to increase and the magnitude, or size, of the various elements is minimized to reduce distance between the elements, it is difficult to exclude the influence between elements caused by interference by merely isolating the surface layer of the silicon layer by the conventional isolation layer. Also, the impurity junction layer by which semiconductor layers having impurity types different from each other are joined is not suitable for use in a semiconductor device adopting a high voltage element due to an inner pressure limit in joined surfaces. Particularly, the impurity junction layer is not suitable for use in a high radiation environment since current is generated from a depletion layer by radiation such as gamma ray radiation.
To solve the problems, a semiconductor device has been developed that uses an SOI substrate in which a buried oxide layer is formed below the elements. Particularly, in a high performance semiconductor device such as a central processing unit (CPU), the SOI type semiconductor device in which an element region is completely isolated by an insulation layer is widely used.
Referring to
FIG. 1
, an trench isolation layer
112
is formed on a SOI substrate to define element regions. A SOI layer in each element region forms a body
122
of a semiconductor element. The body
122
is in a floating state, which is electrically isolated by the isolation layer
112
. This is an essential condition in the SOI substrate, but may raise various problems due to the floating body effect (FBE). For example, as shown in
FIG. 1
, when current flows in a channel region
120
of an n-type metal oxide silicon field effect transistor (NMOSFET), electrons collide with atoms forming the body
122
to generate pairs of holes and electrons. At this time, in a semiconductor device using a general bulk type substrate, the generated holes can be removed through a ground line connected to the substrate. However, in the semiconductor device using the SOI substrate, the generated holes are accumulated in a low electric potential region of the isolated body
122
, i.e., below an interface between a source region
114
and a channel region
120
. The accumulated holes, as shown in
FIG. 2
, operate to increase the electric potential of the channel and to decrease threshold voltage. Consequently, a change in drain voltage-current characteristic of the transistor such as a kink effect occurs.
Also, if the hole accumulation is intensified, the channel region
120
between the source/drain regions
114
,
116
functions as a base of an n-type impurity doped bipolar transistor, and an n-type impurity region forming the source/drain region
114
,
116
functions as an emitter and a collector thereof, so that an effective npn bipolar transistor is formed. This phenomenon is called a parasitic bipolar action (PBA). Once the PBA occurs, a breakdown voltage of the transistor is deteriorated and thereby the semiconductor device fails to function normally. Also, if the accumulated holes are combined with the electrons forming a portion of current for operating the transistor, a leakage current is generated, which only increases the malfunction of the circuit.
Accordingly, it is required that the semiconductor device adopting the SOI substrate uses a special ground method or means to remove holes accumulated in the body of each element region. As one approach of the special ground method, forming a contact that interconnects an extra ground line and a hole-accumulated region of the body below the interface between the source region and the channel region can be considered. However, since the body divided to define each element region has a shape integrated to suit to each element, a ground contact region
130
, as shown in
FIG. 3
, which penetrates an isolation layer
112
and extends to a hole-accumulated region of a body in a channel region should be formed to form the contact for providing a ground. This ground contact region
130
is also formed below the source/drain region
114
,
116
and the gate electrode
118
. That is, to form the contact and the ground line, the integrated shape of the element regions should be changed. This change results in problems in that the integration degree of the device is lowered, the fabrication process is changed to incorporate the new structure, and the resulting parasitic capacitance is increased.
As another ground method, forming a ground region
230
separately from an element region
222
to provide a ground can be considered, as shown in FIG.
4
and FIG.
5
. To provide a connector
220
between the element region
222
and the ground region
230
, a thin trench isolation layer
212
is formed to have a bottom surface thereof spaced apart from the buried oxide layer
110
. Thus, bodies
222
in the element and ground regions
230
are linked with each other through a SOI layer existing between the thin trench isolation layer
212
of an isolation layer
112
and the buried oxide layer
110
, i.e., a connector
220
, so that holes generated from the element region
222
can be moved to the ground region
230
through the connector
220
. Holes moved to the ground region
230
are discharged to the outside through a contact plug
232
and a ground line
234
. However, when the body linked structure as shown in FIG.
4
and
FIG. 5
is used in the semiconductor device, the holes may not be smoothly discharged due to the resistance of the SOI layer forming the connector
220
.
For example, to discharge the holes smoothly, it is desirable that the connector
220
forming a passage for transferring the holes between the bottom surface of the thin trench isolation layer
212
and the buried oxide layer
110
is heavily doped by a p-type impurity. However, in this case, if boron is used as the p-type impurity, the boron is easily diffused into a peripheral layer such as the buried oxide layer or the thin trench isolation layer. Consequently, the impurity concentration is lowered and thereby the holes are not smoothly discharged.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide an improved SOI type semiconductor device and method of forming the same, which, with high speed operation and precise element isolation, can prevent the malfunction of the semiconductor device from being generated due to a floating body effect.
It is another object of the present invention to provide an improved SOI type semiconductor device and method of forming the same which can effectively discharge holes accumulated in a body of a SOI layer in an element region of a NMOS transistor.
These and other objects can be achieved, according to an aspect of the present invention, by a SOI type semiconductor device comprising a SOI substrate having a lower silicon layer, a buried oxide layer, and a SOI layer which are sequentially stacked, an element region formed in a body of the SOI layer isolated by the buried oxide layer and an isolation layer, for forming source/drain regions of at least one MOSFET, a ground region formed of the body of the SOI layer isolated from the element region by a portion of the isolation layer, and a connector d
Bae Geum-Jong
Kang Hee-Sung
Lee Nae-In
Lee Yun-Hee
Mills & Onello LLP
Nelms David
Nguyen Thinh T.
Samsung Electronics Co,. Ltd.
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