Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2008-01-17
2009-12-29
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S780000, C438S781000, C257SE21026, C257SE21414
Reexamination Certificate
active
07638373
ABSTRACT:
According to a method of manufacturing a thin-film transistor (TFT) substrate, a gate insulation layer, a semiconductor layer, an ohmic contact layer, and a data metal layer are sequentially formed on a substrate. A photoresist pattern is formed in a source electrode area and a drain electrode area. A data metal layer is etched using the photoresist pattern as an etch-stop layer to form a data wire including a source electrode and a drain electrode. A photoresist pattern is reflowed to cover a channel region between a source electrode and the drain electrode. An ohmic contact layer and the semiconductor layer are etched using the reflowed photoresist pattern as an etch-stop layer to form an active pattern including an ohmic contact pattern and a semiconductor pattern. The reflowed photoresist pattern is etched back to expose a portion of the ohmic contact pattern in the channel region. The ohmic contact pattern is etched using the etched-back photoresist pattern as an etch-stop layer.
REFERENCES:
patent: 7208249 (2007-04-01), Montgomery et al.
patent: 2006/0175286 (2006-08-01), Matsushita et al.
patent: 2000-131719 (2000-05-01), None
patent: 1020020022625 (2002-03-01), None
patent: 1020020070100 (2002-09-01), None
Heo Seong-Kweon
You Chun-Gi
F. Chau & Associates LLC
Garber Charles D.
Isaac Stanetta D
Samsung Electronics Co,. Ltd.
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