Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-08-24
2003-08-19
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S938000
Reexamination Certificate
active
06607948
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing a substrate for forming such a semiconductor device thereon.
2. Description of the Related Art
It is known that strained germanium (Ge), silicon (Si) and SiGe show a mobility of electrons and holes higher than that of unstrained ordinary Si. Transistors using such strained Ge, Si or SiGe for the channel layer have been proposed.
Ge, Si or SiGe to be used for the channel layer is formed on an SiGe buffer layer laid on crystal silicon. The SiGe buffer layer is used to absorb the difference in the lattice constant between Si and Ge. To raise the mobility in the channel layer, it is important to increase the strain in the case of a strained Si channel layer. In the case of the SiGe channel layer, the mobility is effectively raised by increasing the composition ratio, or the concentration, of Ge. The Ge concentration in the SiGe buffer layer needs to be raised to a certain extent in order to increase the strain of the strained Si channel layer. The Ge concentration in the SiGe buffer layer also needs to be raised to a certain extent for increasing the strain of the SiGe channel layer.
However, the lattice constant of the underlying Si and that of the SiGe buffer layer show a large difference when the Ge composition ratio of the SiGe buffer layer is high. As a result, there arise problems including that it is no longer possible to provide a sufficiently relaxed SiGe buffer layer and that the dislocation density of the SiGe buffer layer increases. Then, a thick SiGe buffer layer may have to be formed to alleviate these problems.
Meanwhile, known techniques for forming an SiGe layer include the following.
The first one is to epitaxially grow SiGe on an SOI (silicon on insulator) substrate [A. R. Powell et al., Appl. Phys. Lett. 64, 1856 (1994)]. However, this technique is accompanied by the problem that dislocations can occur in the SOI layer as a result of the annealing for relaxing the epitaxially grown SiGe.
With the second technique, an oxide film formed on an Si substrate and the SiGe epitaxially grown on the Si substrate are bonded together and subsequently the epitaxially grown SiGe is partly removed [Japanese Registered Patent Nos. 3037934 and 2908787]. With this technique, an about several micrometers thick SiGe buffer layer is formed on the Si substrate and then an SiGe thin film having a desired composition ratio is formed thereon. Then, as a result, undulations that are referred to as cross hatches are produced on the surface. Additionally, the buffer shows a high dislocation density in the inside, which increases as the Ge concentration rises.
The third technique is to form an SiGe layer on an oxide film by a SIMOX method using oxygen ion implantation and annealing. However, with this technique, Ge and oxygen are coupled together to evaporate in the annealing process so that it is no longer possible to form a buried oxide film continuously when the Ge concentration is raised.
On the other hand, Japanese Patent Application Laid-Open No. 2-196436 discloses a transistor formed by using strained Ge for the channel layer and having a structure produced by sequentially laying a p-SiGe buffer layer, an i-SiGe spacer layer, an i-Ge channel layer, an i-SiGe spacer layer, a p-SiGe layer, an i-SiGe layer (SiGe cap layer) and a Ti Schottky gate electrode on an n type Si substrate.
With the above described transistor structure, the SiGe buffer layer is directly formed on the Si substrate, the SiGe spacer layer is formed on the SiGe buffer layer and the Ge channel layer is formed thereon. Accordingly, the SiGe buffer layer needs to have a large film thickness in order to absorb the difference in the lattice constant between Si and Ge. Additionally, the above structure is also accompanied by the problem of an increased leak current because defects such as dislocations are formed in the SiGe buffer layer and the problem that the leak current directly flows to the Si substrate because no insulating layer is interposed between the Si substrate and the SiGe buffer layer.
It should be noted here that E. Murakami et al., IEEE Transaction on Electron Devices, Vol. 41, p. 857 (1994) and Y. H. Xie et al., Applied Physics Letters Vol. 63, p. 2263 (1994) disclose similar structures.
In short, by any of the above described known methods of manufacturing a substrate, it is difficult to provide a thin SiGe buffer layer that shows a high Ge concentration and few defects such as dislocations and is sufficiently relaxed.
Additionally, known semiconductor devices of the type under consideration show a large leak current and hence cannot provide satisfactory characteristics and a sufficient level of reliability because it is difficult to obtain a high quality SiGe buffer layer.
BRIEF SUMMARY OF THE INVENTION
In the first aspect of the invention, there is provided a semiconductor device comprising: a base substrate; a silicon oxide layer formed on the base substrate; a first semiconductor layer formed on the silicon oxide layer, the first semiconductor layer including an SiGe layer with a Ge concentration not less than 30 atomic %; a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer including a Ge layer or an SiGe layer with a Ge concentration higher than the first semiconductor layer; a gate electrode configured to induce a channel in a surface region of the second semiconductor layer; and a gate insulating film formed between the second semiconductor layer and the gate electrode.
In the second aspect of the invention, there is provided a method of manufacturing a substrate comprising: forming a laminated layer including a layer containing silicon and oxygen and an SiGe layer, the layer containing silicon and oxygen being located between the base substrate and the SiGe layer; and oxidizing the SiGe layer to form a silicon oxide layer and to increase a Ge concentration of the SiGe layer.
REFERENCES:
patent: 4442449 (1984-04-01), Lehrer et al.
patent: 4975387 (1990-12-01), Prokes et al.
patent: 5218213 (1993-06-01), Gaul et al.
patent: 5521108 (1996-05-01), Rostoker et al.
patent: 5759898 (1998-06-01), Ek et al.
patent: 6059895 (2000-05-01), Chu et al.
patent: 6228692 (2001-05-01), Tsutsu
Sugiyama e al., “Semiconductor Devices and Methods for Producing Semiconductor Devices”, U.S. patent application No. 09/658,191, filed, Sep. 8, 2000.
Sugiyama et al., “Semiconductor Device and Method for Manufacturing the Same”, U.S. patent application No. 09/468,923, filed Dec. 22, 1999.
Mizuno et al., “Semiconductor Device and Method of Manufacturing the Same”, U.S. patent application No. 09/810,607, filed Mar. 19, 2001.
Y.H. XIE, et al., “Very High Mobility Two-Dimensional Hole Gas in Si/GexSi1−x/Ge Structures Grown by Molecular Beam Epitaxy”, Appl. Phys. Lett. 63 (16), pp. 2263-2264, (1993).
E. Murakami et al., “Fabrication of a Strain-Controlled SiGe/Ge MODFET With Ultrahigh Hole Mobility”, IEEE Transactions on Electron Devices, vol. 41, No. 5, pp. 857-861, (1994).
Copending U.S. patent application No. 09/995,144, Naoharu Sugiyama et al., “Semiconductor Device and Method of Producing the Same,” filed Sep. 19, 2001.
Kurobe Atsushi
Mizuno Tomohisa
Sugiyama Naoharu
Takagi Shin-ichi
Tezuka Tsutomu
Chaudhari Chandra
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
LandOfFree
Method of manufacturing a substrate using an SiGe layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a substrate using an SiGe layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a substrate using an SiGe layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3106915