Method of manufacturing a split-gate flash memory cell

Details Method of manufacturing a split-gate flash memory cell Method of manufacturing a split-gate flash memory cell

1998-06-04

2000-01-11

Dutton, B

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438266, H01L 21301, H01L 2146, H01L 2178

Patent

active

060135522

ABSTRACT:
In a method of manufacturing a split-gate flash memory cell including source and drain diffusion regions (6 and 9), a floating gate insulation film (2), a floating gate electrode (3), a control gate insulation film (4), and a control gate electrode (10), the method includes the steps of: successively forming the floating gate insulation film (2) and the floating gate electrode (3) on a selected area of a semiconductor substrate (1); forming the control gate insulation film (4) on the floating gate electrode (3) and on a remaining area of the semiconductor substrate (1), the control gate insulation film (4) having a side wall part brought into contact with a side wall of the floating gate electrode (3); carrying out ion-implantation of a first dopant to form the source diffusion region (6) on a first part of the remaining area of the semiconductor substrate (1); forming a sidewall electrode (8) brought into contact with the sidewall part of the control gate insulation film (4); carrying out ion-implantation of a second dopant to form, on a second part of the remaining area of the semiconductor substrate (1), the drain diffusion region (9) self-aligned with respect to the sidewall electrode (8); and forming the control gate electrode (10) on the control gate insulation film (4) and on the sidewall electrode (8).

REFERENCES:
patent: 5138573 (1992-08-01), Jeuch
patent: 5268585 (1993-12-01), Yamauchi
patent: 5880499 (1999-03-01), Oyama

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