Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-08-29
2003-05-27
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S111000, C257S673000, C257S738000
Reexamination Certificate
active
06569764
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a package technique suitable for a semiconductor device.
A power transistor having a surface mount type plastic-package structure called TSSOP (Thin Shrink Small Qut-line Package), for example, is known as a semiconductor device. The TSSOP type power transistor is heavily used in a portable telephone, a charger for a video camera or the like, and a power circuit for a personal computer or the like.
The TSSOP type power transistor principally includes a semiconductor chip in which electrodes are formed on an element forming surface and a rear surface opposite to each other, a supporting member for supporting the rear surface of the semiconductor chip, a resin sealing body for sealing the semiconductor chip, and a plurality of leads. The plurality of leads have inner lead portions (also called inner leads) which extend over the interior and exterior of the resin sealing body and are local ed inside the resin sealing body, and outer lead portions (also called outer leads) located outside the resin sealing Body, respect rely. The outer lead portions of the plurality of leads are respectively bent and formed in a gulling type corresponding to one of lead figurations for surface mount. The inner lead portions of some of the plurality of leads are electrically connected to the electrodes on the element forming surface of the semiconductor chip through conductive wires, whereas the inner lead portions of other leads are electrically connected to the electrodes on the rear surface of the semiconductor chip through the supporting member.
Incidentally, the TSSOP type power transistor has been described in, for example, Toshiba Review, Vol. 53 No. 11 (1998), pp. 45-47 (2.5V driven-type III generation trench gate MOSFET).
SUMMARY OF THE INVENTION
As a result of discussions about a package (semiconductor package) for a semiconductor device by the present inventors, they have found out the following problems:
(1) With reductions in the size and weight of electronic equipment, semiconductor devices incorporated into these electronic equipment have been reduced in thickness. Since the reductions in the size and weight of the electronic equipment are expected to be pursued even from now on, it is necessary to achieve a further reduction in the thickness of the semiconductor device.
As in the case of the TSSOP type, however, the package structure for sealing then semiconductor chip by transfer molding (resin mold) needs a resin passage for allowing a resin to flow into the element forming surface side and rear surface side of the semiconductor chip when the transfer molding is carried out by using a molding die. Since the thickness of the entire package becomes thick by a portion equivalent to the thickness of the resin passage, a further reduction in thickness is difficult.
In the package structure for electrically connecting the electrodes on the element forming surface of the semiconductor chip and the leads thereof by the conductive wires, as in the case of the TSSOP type, the thickness of a resin on the element forming surface side of the semiconductor chip becomes thick by a portion equivalent to a loop height (corresponding to the height from the element forming surface of the semiconductor chip to the top extending in the vertical direction thereof) of each conductive wire. It is therefore difficult to achieve a further reduction in thickness.
(2) Since the amount of a current to be handled is large in the power transistor, it is desired to provide a package structure excellent in heat radiation property for discharging or radiating heat produced from the semiconductor chip into the outside. However, since the semiconductor chip and the inner lead portions of the leads are covered with a resin low in thermal conductivity in the package structure for sealing she semiconductor chip and the inner lead portions of the leads with the resin sealing body, as in the case of the TSSOP type, the heat radiation property for discharging the head generated in the semiconductor chip into the outside is low.
(3) In the package structure for electrically connecting the electrodes and leads on the element forming surface of the semiconductor chip by the conductive wires, as in the case of the TSSOP type, a conductive oath between each electrode and lead of the semiconductor chin becomes long, thereby leading to a hindrance to a reduction in on resistance in the power transistor and a hindrance to the speeding up of a semiconductor device having a semiconductor chip equipped with circuits.
An object of the present invention is to provide a technique capable of achieving a reduction in the thickness of a semiconductor device.
Another object of the present invention is to provide a technique capable of achieving an improvement in the heat radiation property of a semiconductor device.
A further object of the present invention is to provide a technique capable of achieving a reduction in the on resistance of a semiconductor device.
A still further object of the present inventions to proved a technique capable of achieving the speeding up of a semiconductor device
The above, other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
Summaries of typical ones of the inventions disclosed in the present application will be described briefly as follows:
(1) A semiconductor device comprises:
a semiconductor chip having a first main surface and a second main surface opposite to each other, first and second electrodes formed on the first main surface, and a third electrode formed on the second main surface,
a first lead having a first portion placed on the first electrode and a second portion continuously formed with the first portion and placed outside the semiconductor chip,
a second lead having a first portion placed on the second electrode and a second portion continuously formed with the first portion and placed outside the semiconductor chip,
a plurality of projecting electrodes which are disposed between the first portion of the first lead and the first electrode and between the first portion of the second lead and the second electrode and electrically connect the respective portions to one another, and
an insulating sheet which is disposed between the first portion of the first lead and the first main surface of the semiconductor chip and between the first portion of the second lead and the first main surface of the semiconductor chip, and covers the first main surface of the semiconductor chip other than a region in which the plurality of projecting electrodes are disposed.
(2) In the semiconductor device described in the means (1), the first electrode is a source electrode, the second electrode is a gate electrode, and the third electrode is a drain electrode.
(3) In the semiconductor device described in the means (1), the first electrode is a drain electrode, the second electrode is a gate electrode, and the third electrode is a source electrode.
(4) In the semiconductor device described in the means (1), the respective second portions of the first and second leads are bent so that tip portions thereof are located on the second main surface side of the semiconductor chip.
(5) A semiconductor device comprises:
a semiconductor chip having a first main surface and a second main surface opposite to each other, first and second electrodes formed on the first main surface, and a third electrode formed on the second main surface and having a flat surface formed in the form of a square,
at least one first lead having a first portion placed on the first electrode and a second portion which is continuously formed with the first portion and placed outside a first side of the first side and a second side opposite to each other, of the semiconductor chip and which has a projecting part which projects from the first portion to the outside of the semiconductor chip, a transitional part bent toward the second main surface side of the semiconductor chip from the
Hirashima Toshinori
Kajiwara Ryoichi
Kishimoto Munehisa
Koizumi Masahiro
Takahashi Yasushi
Berezny Nema
Jr. Carl Whitehead
Mattingly Stanger & Malur, P.C.
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