Method of manufacturing a semiconductor non-volatile memory

Details Method of manufacturing a semiconductor non-volatile memory Method of manufacturing a semiconductor non-volatile memory

2006-01-31

2006-01-31

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S353000

Reexamination Certificate

active

06991982

ABSTRACT:
A method of manufacturing a semiconductor device comprising a non-volatile memory with memory transistors and selection transistors. In this method a semiconductor body is provided with strip-shaped active regions (4) which are mutually isolated by field-oxide regions (3of4). On the surface (2) a first system of conductors11is then formed which are directed perpendicularly to the active regions and are covered by an insulating layer (12), charge storage regions (13) being formed below these conductors, at the location where these conductors and the active regions cross each other. These conductors form word lines of the memory and, at the location where said conductors and the active regions cross each other, they form control gates. Next, a conductive layer (16) is deposited and planarized. The planarized conductive layer (16) is then provided with an etch mask with strips directed perpendicularly to the active regions, which strips extend above and next to the conductors (11). Then a second system of conductors (19) is etched in the planarized conductive layer. The planarized layer here covers the conductors (11) with the insulating top layer (12) completely, so that the conductors (19) of the second system extend above the conductors (11) of the first system. Thus a very compact memory can be produced, enabling data written in the memory to be read out in very short times.

REFERENCES:
patent: 6063702 (2000-05-01), Chung
patent: 6551890 (2003-04-01), Dekker et al.
patent: 6724093 (2004-04-01), Cutter

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