Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-04
2009-11-10
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
07615453
ABSTRACT:
In the chip with which a plurality of MISFET from which threshold value voltage differs is intermingled, leakage current, such as GIDL current and BTBT current, is suppressed, inhibiting the short channel effect of MISFET. The concentration of the impurity for threshold value voltage adjustment implanted to the region in which n channel type MISFET with relatively low threshold value voltage is formed is made lower than the concentration of the impurity for threshold value voltage adjustment implanted to the region in which n channel type MISFET with relatively high threshold value voltage is formed. Implantation amount of the impurity at the time of forming n−type semiconductor region19and punch-through stopper layer20in region ALTN is made larger than the implantation amount of the impurity at the time of forming n−type semiconductor region16and punch-through stopper layer17in region AHTN, respectively.
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Garber Charles D.
Miles & Stockbridge P.C.
Renesas Technology Corp.
Stevenson Andre′ C
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