Method of manufacturing a semiconductor integrated circuit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S152000, C438S151000, C438S155000, C438S244000, C438S301000, C438S306000, C438S634000

Reexamination Certificate

active

07045413

ABSTRACT:
Methods of manufacturing a semiconductor integrated circuit using selective disposable spacer technology and semiconductor integrated circuits manufactured thereby: The method includes forming a plurality of gate patterns on a semiconductor substrate. Gap regions between the gate patterns include first spaces having a first width and second spaces having a second width greater than the first width. Spacers are formed on sidewalls of the second spaces, and spacer layer patterns filling the first spaces are also formed together with the spacers. The spacers are selectively removed to expose the sidewalls of the first spaces. As a result, the semiconductor integrated circuit includes wide spaces enlarged by the removal of the spacers and narrow and deep spaces filled with the spacer layer patterns.

REFERENCES:
patent: 6043537 (2000-03-01), Jun et al.
patent: 6433381 (2002-08-01), Mizutani et al.
patent: 6509216 (2003-01-01), Chien et al.
patent: 6531353 (2003-03-01), Lee
patent: 6873019 (2005-03-01), Ida et al.

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