Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-03-28
2004-03-30
Thompson, Craig (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06713353
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor integrated circuit device. More particularly, the invention relates to technology that can be effectively applied to a semiconductor integrated circuit device containing two kinds of MISFETs (metal insulator semiconductor field-effect transistors) to which different voltages are applied.
In a memory LSI, such as, CMOS (complementary metal oxide semiconductor) logic LSI (large scale integrated circuit) and a SRAM (static random access memory) or DRAM (dynamic random access memory), as well as in a CMOS logic LSI mounting a memory circuit, the power source voltages may not often be the same between the internal circuit and the input/output circuit. In the CMOS logic LSI, for example, the length (gate length) of the gate electrodes of MISFETs in the internal circuit is set to be shorter than the gate length of MISFETs in the input/output circuit in order to increase the speed. In order to maintain a breakdown voltage of the semiconductor regions constituting the sources and drains of MISFETs in the internal circuit, however, the power-source voltage for the internal circuit is set to be lower than the power-source voltage for the input/output circuit. Here, in order to maintain the reliability of the gate-insulating films of MISFETs in the input/output circuit having a high power-source voltage, the thickness of the gate-insulating films is selected to be larger than the thickness of the gate-insulating films of MISFETs in the internal circuit having a low power-source voltage.
Two kinds of gate-insulating films having different thicknesses are formed on a semiconductor substrate made of silicon by, first, forming element isolation regions on the main surface of the semiconductor substrate and, then, subjecting the semiconductor substrate to heat oxidation treatment a first time to form a silicon oxide film on the surface of the semiconductor substrate. Next, active regions where the thick gate-insulating film will be formed are covered with a photoresist film, the silicon oxide film on the active regions where the thin gate-insulating film will be formed is removed by wet etching and, then, the photoresist film is removed, followed by heat-oxidizing the semiconductor substrate a second time. That is, the thin gate-insulating film is formed through heat oxidation a second time, and the thick gate-insulating film is formed through the heat oxidation the first time and through the heat oxidation the second time.
SUMMARY OF THE INVENTION
Through their study, however, the present inventors have discovered the fact that, according to the above-mentioned method of forming two kinds of gate-insulating films of different thicknesses, the active regions where the thick gate-insulating film is to be formed is covered with the photoresist film at the time of removing, by wet etching, the silicon oxide film from the active regions where the thin gate-insulating film is to be formed. Therefore, the thin gate-insulating film, thick gate-insulating film or these two gate-insulating films lose breakdown voltage due to contamination caused by the photoresist film and due to any damage which occurs in the step of removing the photoresist film and in the subsequent step of washing.
The object of the present invention is to provide technology capable of improving the reliability of a the semiconductor integrated circuit device containing a plurality of kinds of MISFETs having gate-insulating films of different thicknesses.
The above and other objects as well as novel features of the invention will become obvious from the description of provided in the specification and the accompanying drawings.
Briefly described below are representative examples of the invention disclosed in this application.
That is, the invention is concerned with a process for forming two kinds of gate-insulating films, wherein a first insulating film is formed by etching, using a photoresist film as a mask, on a region of a semiconductor substrate where an insulating film of a first relatively large thickness is to be formed and, then, a second insulating film is formed on the first insulating film in order to prevent the first insulating film from being scraped off in the step of washing which precedes the processing for forming an insulating film of a second relatively small thickness.
Further, the invention is concerned with a process for forming two kinds of gate-insulating films, wherein a first insulating film is formed by etching, using a photoresist film as a mask, on a region of a semiconductor substrate where an insulating film of a first relatively large thickness is to be formed and, then, a second insulating film that has been formed in advance on the first insulating film is used as an etching stopper in the step of washing which precedes the processing for forming an insulating film of a second relatively small thickness.
Other representative examples of the invention disclosed in the application are as described below briefly.
1. A method of manufacturing a semiconductor integrated circuit device by forming an insulating film of a first thickness on a first active region of a semiconductor substrate and forming an insulating film of a second thickness smaller than said first thickness on a second active region, said method comprising the steps of:
(a) forming a first insulating film on the surface of said semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) covering said first active region with a masking pattern;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) selectively removing chiefly said second insulating film from said first active region after said masking pattern has been removed; and
(f) forming a third insulating film on said semiconductor substrate.
2. A method of manufacturing a semiconductor integrated circuit device by forming an insulating film of a first thickness on a first active region of a semiconductor substrate and forming an insulating film of a second thickness smaller than said first thickness on a second active region, said method comprising the steps of:
(a) forming a first insulating film on the surface of said semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film after the surface of said first insulating film has been removed by not more than about 1 nm;
(c) covering said first active region with a masking pattern;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) selectively removing said second insulating film from said first active region after said masking pattern has been removed; and
(f) forming a third insulating film on said semiconductor substrate.
3. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
(a) forming a first insulating film on the surface of a semiconductor substrate;
(b) forming a second insulating film which is a protection film on said first insulating film;
(c) forming a masking pattern on said semiconductor substrate so as to cover a first region where an insulating film having a relatively large thickness will be formed but not covering a second region where an insulating film having a relatively small thickness will be formed other than said first region;
(d) successively removing said second insulating film and said first insulating film from said second active region by using said masking pattern as a mask;
(e) after said masking pattern has been removed, removing said second insulating film by washing said semiconductor substrate, said second insulating film being used for suppressing said first insulating film from being scraped off; and
(f) forming a third insulating film on said semiconductor substrate in order to form an insulating film of a first
Hiraiwa Atsushi
Horibe Shinichi
Ikeda Shuji
Kanda Takayuki
Sakai Satoshi
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