Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-10
2006-01-10
Geyer, Scott (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06984557
ABSTRACT:
Consistent with an example embodiment, there is a method for manufacturing a semiconductor device. The semiconductor device comprises a semiconductor body provided at a surface with a non-volatile memory including a memory cell with a gate structure with an access gate and a gate structure with a control gate and a charge storage region situated between the control gate and the semiconductor body. In the method, on the surface of the semiconductor body a first one of said gate structures is formed with side walls extending substantially perpendicular to the surface, a conductive layer is deposited on and next to said first gate-structure, the conductive layer is subjected to a planarizing treatment until the first gate structure is exposed and the so planarized conductive layer is patterned so as to form at least a part of the other gate structure adjoining only a first one of the side walls of the first gate structure.
REFERENCES:
patent: 6642103 (2003-11-01), Wils et al.
patent: 2002/0137290 (2002-09-01), Wils et al.
patent: 2004/0175886 (2004-09-01), Slotboom et al.
Geyer Scott
Koninklijke Philips Electronics , N.V.
Zawilski Peter
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