Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-10
2005-05-10
Tran, Thien F (Department: 2811)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S254000, C438S255000, C438S256000, C438S396000, C438S397000, C438S398000, C438S399000
Reexamination Certificate
active
06890817
ABSTRACT:
A semiconductor device and a method of manufacturing thereof can be gained wherein the occurrence of defects can be prevented and it is possible to reduce the manufacturing cost. The semiconductor device includes a capacitor electrode, an insulating layer and a wiring layer. The capacitor electrode is formed on the semiconductor substrate. The insulating film which is formed on the capacitor electrode has a trench which exposes part of the capacitor electrode and has an upper surface. The wiring layer fills in the inside of the trench, has an upper surface and is connected with the capacitor electrode. The upper surface of the wiring layer is located on approximately the same plane as the upper surface of the insulating film.
REFERENCES:
patent: 6255151 (2001-07-01), Fukuda et al.
patent: 6424011 (2002-07-01), Assaderaghi et al.
patent: 6759703 (2004-07-01), Matsuhashi
patent: 1999-0062885 (1999-07-01), None
M. Igarashi, A. Harada, H. Amishiro, H. Kawashima, N. Morimoto, Y. Kusumi, T. Saito, A. Ohsaki, T. Mori, T. Fukada, Y. Toyoda, K. Higashitani, and H. Arima, “The Best Combination Of Aluminium and Copper Interconnects For a High Performance 0.18μm CMOS Logic Device,” IEDM98, 1998, pp. 829-832.
J. Heidenreich, D. Edelstein, R. Goldblatt, W. Cote, C. Uzoh, N. Lustig, T. McDevitt, A. Stamper, A. Simon, J. Dukovic, R. Wachnik, H. Rathore, S. Luce, and J. Slattery, “Copper DualDamasceneWiring for Sub-0.25μm CMOS Technology,” pp. 13-15.
Maeda Hiroshi
Oashi Toshiyuki
Uehara Takashi
Renesas Technology Corp.
Tran Thien F
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