Method of manufacturing a semiconductor device that includes...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S232000, C438S276000, C438S286000, C438S291000, C257SE21634

Reexamination Certificate

active

10986896

ABSTRACT:
With the objective of suppressing or preventing a kink effect in the operation of a semiconductor device having a high breakdown voltage field effect transistor, n+type semiconductor regions, each having a conduction type opposite to p+type semiconductor regions for a source and drain of a high breakdown voltage pMIS, are disposed in a boundary region between each of trench type isolation portions at both ends, in a gate width direction, of a channel region of the high breakdown voltage pMIS and a semiconductor substrate at positions spaced away from p−type semiconductor regions, each having a field relaxing function, of the high breakdown voltage pMIS, so as not to contact the p−type semiconductor regions (on the drain side, in particular). The n+type semiconductor regions extend to positions deeper than the trench type isolation portions.

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patent: 2001-160623 (2001-06-01), None

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