Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Patent
1995-08-30
1999-10-05
Dutton, Brian
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
438154, 437 26, 437 24, 437203, 437228, H01L 2100, H01L 2184, H01L 2131, H01L 21469, H01L 21265, H01L 2144, H01L 2148, H01L 21465
Patent
active
059638389
ABSTRACT:
A transistor element is formed on the surface of a silicon substrate. A tunnel is formed in the silicon substrate at a position right under the transistor element. A contact hole is formed to extend from the surface of the silicon substrate to the contact hole. Silicon oxide films are respectively formed on the inner surfaces of the tunnel and the contact hole. A wiring layer is buried in the tunnel and the contact hole. The wiring layer is connected to a diffusion layer of the transistor element.
REFERENCES:
patent: 3381182 (1968-04-01), Thornton
patent: 4478655 (1984-10-01), Nagakubo et al.
patent: 4532700 (1985-08-01), Kinney et al.
patent: 4800170 (1989-01-01), Jain et al.
patent: 4816421 (1989-03-01), Dynes et al.
patent: 4888300 (1989-12-01), Burton
patent: 4925805 (1990-05-01), Van Ommen et al.
patent: 4977439 (1990-12-01), Esquivel et al.
patent: 5236872 (1993-08-01), Van Ommen et al.
patent: 5278102 (1994-01-01), Horie
patent: 5306942 (1994-04-01), Fujii
patent: 5449630 (1995-09-01), Lur et al.
patent: 5510272 (1996-04-01), Morikawa et al.
Sugiura Souichi
Yamamoto Tadashi
Dutton Brian
Kabushiki Kaisha Toshiba
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