Method of manufacturing a semiconductor device having a buried i

Details Method of manufacturing a semiconductor device having a buried i Method of manufacturing a semiconductor device having a buried i

1996-11-15

1998-03-10

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438589, H01L 21336

Patent

active

057260885

ABSTRACT:
In a vertical power MOSFET having a U-shaped trench gate and a method of manufacturing the same, a P-type base layer and an N.sup.+ -type emitter layer are formed on the surface of an N-type semiconductor substrate. A plurality of trenches are formed to such a depth as to reach the semiconductor substrate. After that, an oxide film and a nitride film are formed in this order on the surface of the resultant element and on the inner surfaces of the trenches. In this case, the oxide film and nitride film are each formed to have a thickness corresponding to the operating characteristics of the element at the stage of design. The nitride film of a gate wiring region is selectively removed to form an oxide film on the surface of the element. Consequently, a thick gate insulation film of the oxide films can be formed between the corner portions of the N.sup.+ -type emitter layer and a gate electrode wiring layer of the gate wiring region which is to be formed afterward, and the gate-to-source breakdown voltage can be enhanced.

REFERENCES:
patent: 4756793 (1988-07-01), Peek
patent: 5282018 (1994-01-01), Hiraki et al.
patent: 5321289 (1994-06-01), Baba et al.
patent: 5326711 (1994-07-01), Malhi
patent: 5392237 (1995-02-01), Iida

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