Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-01-05
2002-12-17
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S254000
Reexamination Certificate
active
06495418
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and in particular to a method of manufacturing a semiconductor device having a reliable capacitor.
2. Description of the Background Art
In recent years, demand for semiconductor devices have been increased due to remarkable popularization of information devices such as computers. It has been required for such a semiconductor device, as for the function thereof, to have a large-scale memory capacity and an ability of operating at a high speed. Accordingly, technological developments have been in progress for higher integration, faster responsiveness, and higher reliability.
In a capacitor of a Dynamic Random Access Memory (hereinafter referred to as “DRAM”) a three-dimensional structure and a rough-surfaced structure have been employed in order to secure a capacitance. A DRAM in which the rough-surfaced structure is applied in a cylindrical capacitor will be described below.
Referring to
FIG. 20
, a well implant layer
102
and isolation insulating films
103
are formed on a P-type silicon substrate
101
. Thereafter, Polysilicon films
106
a
,
106
b
, silicide films
107
a
,
107
b
and insulating films
108
a
,
108
b
are respectively formed, with gate insulating films
105
a
,
105
b
interposed, on a region between isolation insulating films
103
.
Drain regions
104
a
,
104
b
and
104
c
are respectively formed, for example, by introducing an impurity with an ion implantation method, using insulating films
108
a
,
108
b
and so forth as masks. Side wall insulating films
109
a
,
109
b
are respectively formed on side surfaces of polysilicon films
106
a
,
106
b
, silicide films
107
a
,
107
b
and insulating films
108
a
,
108
b
. Thus, gate electrodes including polysilicon films
106
a
,
106
b
and silicide films
107
a
,
107
b
are respectively formed.
An inter-layer insulating film
110
is formed on silicon substrate
101
by CVD (Chemical Vapor Deposition) method so as to cover the gate electrodes. A bit-line contact hole
110
a
which exposes the surface of source/drain region
104
b
is formed on the inter-layer insulating film
110
. A polysilicon film
111
, a silicide film
112
and an insulating film
114
are formed in bit-line contact hole
110
a
. A side wall insulating film
115
is formed on the side surfaces of polysilicon film
111
, silicide film
112
and insulating film
114
. Thus, a bit line
113
including polysilicon film
111
and silicide film
112
is formed.
An inter-layer insulating film
116
is further formed on inter-layer insulating film
110
so as to cover bit line
113
. Storage node contact holes
116
a
,
116
b
, respectively exposing the surfaces of source/drain regions
104
a
,
104
c
are formed in inter-layer insulating films
116
and
110
. Polysilicon plugs
117
a
and
117
b
are respectively formed to fill in storage node contact holes
116
a
and
116
b.
An inter-layer insulating film
118
is further formed on inter-layer insulating film
116
. Openings
118
a
,
118
b
respectively exposing the surfaces of polysilicon plugs
117
a
,
117
b
are formed on inter-layer insulating film
118
. Thereafter, a polysilicon film
119
is formed on inter-layer insulating film
118
including the side and bottom surfaces of openings
118
a
,
118
b
. A rough-surfaced polysilicon film
120
is formed on poly-silicon film
119
.
Referring to
FIG. 21
, a photoresist
121
is applied to rough-surfaced polysilicon film
120
. Next, referring to
FIG. 22
, the entire surface of photoresist
121
is etched to remove photoresist
121
located above the top surface of inter-layer insulating film
118
and to leave photoresist
121
only in openings
118
a
,
118
b.
Referring to
FIG. 23
, for example, by dry etching, for example, polysilicon film
119
and rough-surfaced polysilicon film
120
exposed on the top surface of inter-layer insulating film
118
are removed. Thereafter, as shown in
FIG. 24
, photoresist
121
that has been left in openings
118
a
,
118
b
is removed. Thus, storage nodes
122
a
,
122
b
including polysilicon films
119
a
,
119
b
and rough-surfaced polysilicon films
120
a
,
120
b
are respectively formed. A dielectric film
123
is then formed on rough-surfaced polysilicon films
120
a
,
120
b.
Referring now to
FIG. 25
, a cell plate
124
including, for example, a polysilicon film is formed on dielectric film
123
. An inter-layer insulating film
125
is formed so as to cover cell plate
124
. A predetermined aluminum interconnection
126
is formed on inter-layer insulating film
125
. Thus, the main part of the DRAM is completed.
However, a problem as described below lies in the above-described method of manufacturing a semiconductor device. When storage nodes
122
a
,
122
b
of the capacitor are formed, polysilicon film
119
and rough-surfaced polysilicon film
120
located above inter-layer insulating film
118
are removed by dry etching in the step shown in FIG.
23
.
This may make the top end portions of storage nodes
122
a
,
122
b
be pointed as shown in
FIG. 26
, which may degrade the reliability of dielectric films to be formed thereupon. As a result, the reliability of the capacitor may be deteriorated. Moreover, the pointed portions of storage nodes
122
a
,
122
b
may be broken off in the subsequent processes, causing a pattern defect, which would disadvantageously lower the yield.
Further, a process of increasing the particle size of a rough-surfaced polysilicon film may be employed in order to secure the capacitance of the capacitor. In such a case, as shown in
FIGS. 27 and 28
, an amorphous silicon film
131
is formed, with a relatively thin insulating film
130
interposed, on a polysilicon film
129
.
Thereafter, by a predetermined thermal process, amorphous silicon film
131
is made rough, forming a rough-surfaced polysilicon film
132
, as shown in FIG.
29
. It is noted that insulating film
130
would disappear by the thermal process. Through such a process, particles of rough-surfaced polysilicon film
132
will be increased in size. In such a case, however, adhesiveness between rough-surfaced polysilicon film
132
and polysilicon film
129
is insufficient so that the particles of rough-surfaced polysilicon film
132
may be separated from the surface of polysilicon film
129
. Thus, the capacitance of the capacitor may not be sufficiently secured, which would lower the reliability of the capacitor.
SUMMARY OF THE INVENTION
The present invention is directed to solve the problems described above. It is an object of the present invention to provide a method of manufacturing a semiconductor device in which a reliable capacitor is secured.
The first aspect of the method of manufacturing the semiconductor device according to the present invention includes the steps below. An insulating film is formed on a semiconductor substrate. An opening is formed in the insulating film. A conductive layer is formed on the insulating film including side and bottom surfaces of the opening. A coating layer is formed on the conductive layer including an inner side of the opening. A predetermined removal process is performed on the coating layer and the conductive layer that are located on the insulating film, to make a top end of the conductive layer lower than a top surface of the insulating film to form a first electrode portion. A second electrode portion is formed, with a dielectric film interposed, on the first electrode portion.
This manufacturing method makes the top end of the conductive layer lower than the top surface of the insulating film in the step of forming the first electrode portion, so that the top end portion of the conductive layer will not protrude from the top surface of the insulating film, and thus breakage of the top end portion can be prevented, while no residue or the like of the conductive layer is left and the conductive layer on the insulating film is completely removed. This suppresses generation of pattern def
Miyajima Takashi
Morihara Toshinori
Shimizu Masahiro
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Tsai Jey
LandOfFree
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