Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

2007-05-01

2007-05-01

Tran, Long K. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S201000, C438S288000, C438S573000, C438S652000

Reexamination Certificate

active

11175050

ABSTRACT:
When memory cells of EEPROM and a capacitor element are formed on a same semiconductor substrate, the number of processes is prevented from increasing and a manufacturing cost is reduced. Furthermore, reliability of the capacitor element is improved, and characteristics of the memory cells, a MOS transistor, and so on are prevented from changing. A pair of left and right memory cells is formed in a memory cell formation region of a P-type silicon substrate, being symmetrical to each other with respect to a source region, and a capacitor element formed of a lower electrode, a capacitor insulation film, and an upper electrode is formed in a capacitor element formation region of the same P-type silicon substrate. The lower electrode of the capacitor element is formed by patterning a polysilicon film provided for forming control gates of the pair of memory cells.

REFERENCES:
patent: 6727144 (2004-04-01), Hashimoto
patent: 2003/0235951 (2003-12-01), Hashimoto
patent: 2004/0207004 (2004-10-01), Tamura
patent: 2003-124361 (2003-04-01), None
patent: 2004-200181 (2004-07-01), None

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