Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-04-20
2003-07-15
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S756000, C438S757000
Reexamination Certificate
active
06593179
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device suitable for manufacturing a system LSI equipped with analog circuitry including a capacitor.
2. Description of the Background Art
A capacitor—which comprises a lower electrode formed from polysilicon, a dielectric film formed on the lower electrode, and an upper electrode which is formed from polysilicon and on the dielectric film (i.e., a so-called “poly-poly capacitor”)—is used for an analog circuit included in a system LSI. A multilayered film comprising a silicon oxide film, a silicon nitride film, and a silicon oxide film in the sequence given (hereinafter referred to as an “ONO film”) is used for the poly-poly capacitor.
FIGS. 6A
to
6
C and
FIGS. 7A
to
7
D are cross-sectional views for describing a portion of the steps for manufacturing a system LSI equipped with a poly-poly capacitor. The drawings show that a transistor fabrication region
12
and a capacitor fabrication region
14
are formed in a silicon substrate
10
.
As shown in
FIG. 6A
, an isolation oxide film
16
is formed in the silicon substrate
10
during manufacturing processes. In the case of a device in which miniaturization is pursued to a greater extent, the isolation oxide film
16
is formed through a so-called “shallow-trench process.” According to the shallow trench process, shallow trenches are first formed in the silicon substrate
10
, and an oxide film is embedded in the thus-formed shallow trenches, thereby forming the isolation oxide film
16
. Within the transistor fabrication region
12
, an active region
18
is formed in an area enclosed by the isolation oxide film
16
. A pad oxide film
20
is formed on the surface of the active region
18
during the course of formation of the isolation oxide film
16
.
As shown in
FIG. 6B
, a lower electrode
22
is formed from polysilicon in the capacitor fabrication region
14
. During the process of forming the lower electrode
22
, polysilicon is deposited on the silicon substrate
10
by means of the low-pressure CVD technique. Subsequently, the thus-deposited polysilicon is patterned into the shape of the lower electrode
22
by means of photolithography and dry etching.
As shown in
FIG. 6C
, a multilayered film
24
comprising a silicon oxide film and a silicon nitride film (hereinafter referred to as an “ON film
24
”) is formed on the lower electrode
22
. During the process of forming the ON film
24
, a silicon oxide film is grown over the upper surface of the lower electrode
22
or the overall surface of the silicon substrate
10
, and a silicon nitride film is formed on the silicon oxide film. The silicon oxide film can be formed, for example, by means of thermally oxidizing the surface of polysilicon of the lower electrode
22
or through deposition of oxides by means of the low-pressure CVD technique while dichlorosilane (SiH
2
Cl
2
) and nitrous oxide (N
2
O) are used as source materials.
As shown in
FIG. 7A
, the ON film
24
is patterned into such a shape as to cover only the vicinity of the lower electrode
22
. The ON film
24
is patterned through dry etching while a photoresist film
26
is taken as a mask. At this time, the pad oxide film
20
covering the surface of the active region
18
acts as a protective film for protecting silicon located in the active region
18
from etching gas.
As shown in
FIG. 7B
, the photoresist film
26
covering the ON film
24
and the pad oxide film
20
located in the active region
18
are removed after completion of patterning of the ON film
24
. The pad oxide film
20
can be removed by means of wet etching of the entire surface of the silicon substrate
10
through use of HF. The photoresist film
26
is removed prior to removal of the pad oxide film
20
. In this case, although the ON film
24
is also exposed to HF, the nitride film covering the surface of the ON film
24
is less likely to be etched by HF. Accordingly, the ON film
24
is prevented from being etched to a great extent during the wet etching process.
As shown in
FIG. 7C
, a gate oxide film
28
is formed on the surface of the active region
18
by thermal oxidation of the surface of the silicon substrate
10
. At this time, the surface of the ON film
24
; that is, a nitride film, is lightly oxidized, whereupon the ON film
24
becomes an ONO film
30
.
As shown in
FIG. 7D
, gate electrodes
32
are formed from polysilicon on the gate oxide film
28
, and an upper electrode
34
is formed from polysilicon on the ONO film
30
. The gate electrodes
32
and the upper electrode
34
are formed by deposition of polysilicon on the entire surface of the silicon substrate
10
by means of the low-pressure CVD technique, and by means of patterning the polysilicon into a desired pattern through photolithography and dry etching.
Through a round of the processing operations, a poly-poly capacitor
36
is fabricated in the capacitor fabrication region
14
. A source-drain region is formed in the active region
18
by means of a known technique, whereby a transistor is fabricated in the transistor fabrication region
12
.
The problems involved in the semiconductor device manufacturing method just described will now be described by reference to
FIGS. 8A
to
8
C.
FIG. 8A
is an enlarged view showing a portion of the semiconductor substrate designated by VIII in
FIG. 6C
, and
FIGS. 8B and 8C
are enlarged views showing possible configuration of a portion VIII′ shown in FIG.
7
A.
In a system LSI containing a poly-poly capacitor, there may be a case where the isolation oxide film
16
is formed so as to protrude from the surface,of the active region
18
in order to ensure insulation. Reference symbol T
IO
shown in
FIG. 8A
designates the height of such a protuberance. For convenience sake, it is assumed that the height T
IO
of the protuberance has a value of 500 angstroms. In
FIG. 8A
, reference symbol T
pad
designates the thickness of the pad oxide film
20
, and T
ON
designates the vertical thickness of the ON film
24
.
As mentioned above, the ON film
24
is patterned through dry etching while the photoresist film
26
is taken as a mask (see FIG.
7
A). Since dry etching involves anisotropy, the overall thickness of the ON film
24
is substantially uniformly diminished during the dry etching process.
As shown in
FIG. 8A
, in a boundary between the active region
18
and the isolation oxide film
16
, the thickness T
ON
of the ON film
24
becomes greater than the thickness of the remaining portion thereof, by only the height T
IO
of the protuberance of the isolation oxide film
16
. As shown in
FIG. 8B
, at a point in time at which the isolation oxide film
16
and the active region
18
have become exposed during the dry etching process, an ON residue
38
having a thickness T
IO
(i.e., 500 angstroms) is present in the boundary. In order to remove the ON residue
38
, there must be performed over-etching for removing the ON film
24
by a thickness of 500 angstroms, after the isolation oxide film
16
and the active region
18
have been exposed.
In some cases, a sufficient nitride film/oxide film etch selectivity cannot be obtained, depending on a system or requirements employed for manufacturing a semiconductor. Given that the etch selectivity assumes a value of 2, the isolation oxide film
16
and the pad oxide film
20
are removed by 250 angstroms during the over-etching process for removing 500 angstroms of the ON residue
38
. Consequently, as shown in FIG.
8
C, the upper surface of the isolation oxide film
16
is significantly receded, and the thickness T
pad
of the pad oxide film
20
is significantly diminished (or disappears).
If the upper surface of the isolation oxide film
16
is receded greatly, there may arise a problem of deteriorating the reliability of the gate oxide film
28
(see
FIG. 7C
) formed on the active region
18
, or a problem of an increase in the amo
Malsawma Lex H.
Mitsubishi Denki & Kabushiki Kaisha
Smith Matthew
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