Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-12-23
2001-07-03
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S402000, C257S404000
Reexamination Certificate
active
06255153
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device with a triple-well structure.
2. Description of the Prior Art
Typically, more serious influence by defect and impurities is given as integration of a semiconductor device increases. Lattice defects and impurities which exist in the active area of a semiconductor device reduce life time of the minority carrier and increase leakage current rapidly. Also, such lattice defects and impurities deteriorate film quality of the oxide film and make the threshold voltage of a CMOS device disuniform. Thus, technology to remove lattice defects and impurities is needed. The following two(2) methods are used at present.
The first method is to use the heat process of three(3) steps to execute heat treatment respectively at high, low and high temperature. The second method is to form a lattice defect layer on a semiconductor substrate by heat treatment or ion implantation using high energy after damaging the backside of the semiconductor substrate. One of the disadvantages of the second method is to need long-time process at high temperature, and its process is complex. Particularly, it is a problem in that the second method removes dislocation to act as a trap site of impurities because of process heat, and impurities return to the active area of the semiconductor substrate again.
On the other hand, the conventional method to remove defects and impurities by ion implantation using million electron volts(MeV) is known as the technology to remove defects in a device by inducing defect-to-defect interaction after forming defects deeply in the semiconductor substrate by ion implantation of dopants such as silicon(Si) and carbon(C) that have a little influence on electric property of a parent material.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of manufacturing a semiconductor device which solves the above problems by forming a defect layer of high density on the lower part of a semiconductor substrate before forming a well on the semiconductor substrate, and by performing rapid heat treatment so that the defects and impurities which exist within the semiconductor substrate may be captured by the defect layer or diffuse the outside.
To achieve the above object, the invention provides a method of manufacturing a semiconductor device having a triple-well structure, comprising the steps of:
Forming a first pattern on a semiconductor substrate having a first N-well forming area, a R-well forming area, a second N-well forming area and a P-well forming area, and the first pattern is formed so that the first N-well forming area, the R-well forming area and the second N-well forming area are exposed;
Forming a first defect layer within the substrate at a first predetermined depth from a surface of the substrate by implanting a first N-type impurity ion using the first pattern as a mask;
Forming a bottom N-well within the substrate at a second depth by implanting a second N-type impurity ion using the first pattern as a mask, and the bottom N-well is formed a distance from said substrate surface over the first defect layer with the bottom N-well separated at a distance from the first defect layer;
Removing the first pattern;
Forming a second pattern on the substrate, and the second pattern is formed so that the first N-well forming area, and the second N-well forming area between the R-well forming area and the P-well forming area, are exposed;
Forming a first lateral N-well and a second lateral N-well by implanting a third N-type impurity ion using the second pattern as a mask with portions of the first and second lateral N-wells overlapping opposite end edge portions of the bottom N-well, thereby forming a N-well;
Removing the second pattern;
Forming a third pattern on the substrate, and the third pattern is formed so that the P-well forming area is exposed;
Forming a second defect layer within the substrate at a third predetermined depth by implanting a first P-type impurity ion using the third patter as a mask;
Forming a P-well by implanting a second P-type impurity ion using the third pattern as a mask, and the P-well is formed over the second defect layer and the bottom N-well is separated at a distance from the second defect layer;
Removing the third pattern;
Forming a fourth pattern on the substrate, and the fourth pattern is formed so that the R-well forming area is exposed;
Forming a R-well by implanting a third P-type impurity ion using the fourth pattern as a mask, and the R-well is formed in a portion of the substrate which is enclosed by the N-well;
Removing the fourth pattern; and
Performing rapid heat treatment.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
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Blum David S
Bowers Charles
Cohen & Pontani, Lieberman & Pavane
Hyundai Electronics Industries Co,. Ltd.
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